Earticle

Considerable challenges are encountered when bulk CMOS devices are scaled into the sub-100 nm regime for higher integrated circuit (IC) density and performance. Due to their excellent scalability and better immunity to short channel effects, double-gate (DG) MOSFETs are being easily assessed for CMOS applications beyond the 70 nm of the SIA roadmap. For channel lengths below 100 nm, DG MOSFETs still show considerable threshold voltage roll off and to overcome this effect, different gate engineering techniques can be widely used. In this paper, we investigate the influence of gate engineering on the analog and RF performances of dual material double gate (DM-DG) MOSFETs for system-on-chip applications with high K dielectrics using a 2D device simulator. Equivalent oxide thickness (EOT) of gate oxide can be reduced by the usage of high K dielectric materials. The gate engineering technique used here is the dual metal gate technology. This novel structure shows better immunity to DIBL and improved analog performance like trans conductance generation factor, early voltage, output resistance.

Steganography is going to gain its importance due to the exponential growth and secret communication of potential computer users over the internet. It can also be defined as the study of invisible communication that usually deals with the ways of hiding the existence of the communicated message. Generally data embedding is achieved in communication, image, text, voice or multimedia content for copyright, military communication, authentication and many other purposes. In image Steganography, secret communication is achieved to embed a message into cover image (used as the carrier to embed message into) and generate a stego-image (generated image which is carrying a hidden message). In this paper we have critically analyzed various steganographic techniques and also have covered steganography overview its major types, classification, applications.

A parallel and pipelined Fast Fourier Transform (FFT) processor for use in the Orthogonal Frequency division Multiplexer (OFDM) and WLAN, unlike being stored in the traditional ROM. The twiddle factors in our pipelined FFT processor can be accessed directly. A novel simple address mapping scheme and the modified radix 4 FFT also proposed. FPGA was majorly used to develop the ASIC IC’s to which was implemented. Here we simulated and synthesized the 256- point FFT with radix-4 using VHDL coding and 64 point FFT Hardware implementation we designed code using System C. Finally, the pipelined 256-point FFT processor can be completely implemented within 19.103ns.

Intrusion prospects in cloud paradigm are many and with high gains, may it be a bad user or a competitor of cloud client. Distributed model makes it vulnerable and prone to sophisticated distributed intrusion attacks like Distributed Denial of Service (DDOS) and Cross Site Scripting (XSS). Confronting new implementation situations, traditional IDSs are not well suited for cloud environment. To handle large scale network access traffic and administrative control of data and application in cloud, a new multi-threaded distributed cloud IDS model has been proposed. Our proposed cloud IDS handles large flow of data packets, analyze them and generate reports efficiently. Transparent reports are instantly send for information of cloud user and expert advice for cloud service provider’s network mis-configurations through a third party IDS monitoring and advisory service.

A rail-to-rail class-AB CMOS buffer amplifier is proposed in this paper to drive large capacitive loads. A new technique is used to reduce the leakage power of class-AB CMOS buffer circuits without affecting dynamic power dissipation .The name of applied technique is TRANSISTOR GATING TECHNIQUE, which gives the high speed buffer with the reduced low power dissipation (1.05%), low leakage and reduced area (2.8%) also. The proposed buffer is simulated at 45nm CMOS technology and the circuit is operated at 3V supply with Cadence software. This analog circuit is performed with reduced performance degradation as well as high current driving capability for the large input voltages. The proposed paper is achieved very high speed with very low propagation delay range i.e.(292×10-12). So the delay of the circuit is reduced to 10%. The settling time of this circuit is reduced by 30% (in ns) at 3V square wave input. The measured quiescent current is 56μA.

The aim of this study is to propose the discriminant analysis (DA) techniques to classify and manage risks in software planning development process. These techniques are used to test the controls to each of risks to determine and classify if they are effective in mitigating the occurrence of each risk planning factor. We classified risks to three levels by predicted group membership. Also top ten risks planning software development were mitigated by using controls based on discriminant analysis techniques.

Turbine blades of a gas turbine are responsible for extracting energy from the high temperature, high pressure gases. These blades are operated at elevated temperatures in aggressive environments and are subjected to large centrifugal forces. As many as 42 percent of the failures in gas turbine engines were only due to blading problems and the failures in these turbine blades can have dramatic effect on the safety and performance of the gas turbine engine. In this research paper, an attempt has been made to analyze the failure of gas turbine blade through Mechanical analysis. The blade under investigation belongs to a 30 MW gas turbine engines used in marine applications and is made of Nickel-Base superalloys. Before failure, the turbine blade was operated for about 10000 hours while its service life was expected to be around 15000 hours. Mechanical analysis has been carried out assuming that there might be failure in the blade material due to blade operation at elevated temperature and subjected to large centrifugal forces. The gas turbine blade model profile is generated by using CATIA V5R21software. The turbine blade is analyzed for its thermal as well as structural performance. It was observed that there was no evidence of rubbing marks on the tip section of turbine blade indicating the elongation of the blade is within the safe limit. Maximum stresses and strains are observed near to the root of the turbine blade and upper surface along the blade roots. Maximum temperatures are observed at the blade tip sections and minimum temperature at the root of the blade. Temperature distribution is decreasing from the tip to the root of the blade section. The temperatures observed are below the melting temperature of blade material.

There have been substantially growing needs for storage space as there are more and more valuable and important stuff to be stored. The data which, originally, used to be processed manually and kept physically in the form of paper are now transformed into computerized data. However, these data keep increasing and within a certain period of time they become very large that they take more space to store. This situation causes serious problems in storing and transmitting image data. This research tries to find out the influence of wavelet to the Peak Signal to Noise Ratio (PSNR), and its level of decomposition towards the PSNR. The wavelet used are Daubechies family of Haar (Daubechies 1), Daubechies 2, Daubechies 3, Daubechies 4, Daubechies 5, and Coiflet families, as well as Symlet families. Test images used are 24-bit color image which are 512x512 in size. The wavelet which has the highest PSNR in each family is Haar, Coiflet 3, and Symlet 5. The effect of decomposition level towards PSNR is that the greater is the level of the decomposition, the smaller its PSNR becomes.

A Mobile ad hoc network (MANET) is an infrastructure less network. The nodes in this network are mobile. The topology in MANET keeps on changing. MANETs have its applications in various fields like military, sensor networks, video conferencing etc. This paper discusses about various MANET routing protocols such as Proactive, Reactive, Hybrid, their types, comparison of routing protocols, mobility models in MANET, performance matrices that evaluate the performance of MANET routing protocols and applications of MANET.

User interfaces are the most important part of interactive software applications; being the entities which serve as a communication bridge between users and applications. Furthermore the user experience provided by any software application is the only factor to measure its success. Therefore an application can only be successful if besides having a worthy user interface, it also provides a pleasant user experience. Design of a good user interface suffers a lot recently with a rapid increase in the number of electronic devices as each device has its own constraints and capabilities that force the same application to run in multiple ways on multiple devices, thus generating the problem of inconsistent user interfaces. This situation also prohibits the provision of a good user experience as user interface is a very important aspect among many other aspects of user experience. In this paper; a framework is proposed that makes it possible to design multiple but consistent user interfaces of an application and also provides a wonderful experience to the end users. The proposed framework is validated by developing two different versions of a single interactive software application for two different devices. The development process is done by following the proposed framework. Final user interfaces of both versions are then compared to check consistency. This comparison shows that both user interfaces are consistent to each other and thus the proposed framework is validated.