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A Compiler Integrated Assistance for Optimum Data Allocation in Banked Memory Embedded Processors
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.1-18
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Bank switching in embedded processors having partitioned memory architecture results in code size as well as run time overhead. An algorithm and its application to assist the compiler in eliminating the redundant bank switching codes introduced and deciding the optimum data allocation to banked memory is presented in this work. A relation matrix formed for the memory bank state transition corresponding to each bank selection instruction is used for the detection of redundant codes. Data allocation to memory is done by considering all possible permutation of memory banks and combination of data. The compiler output corresponding to each data mapping scheme is subjected to a static machine code analysis which identifies the one with minimum number of bank switching codes. Even though the method is compiler independent, the algorithm utilizes certain architectural features of the target processor. A prototype based on PIC 16F87X microcontrollers is described. This method scales well into larger number of memory blocks and other architectures so that high performance compilers can integrate this technique for efficient code generation. The technique is illustrated with an example.
Yet another Set of Requirement Metrics for Software Projects
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.19-28
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Software project management has emerged as a new discipline with wide-ranging ideas and across-the-board insights for effectively managing key areas of software projects. The remarkable work of the software project managers, professionals and researchers across the globe have resulted in substantial improvements in this field. Likewise, software project failure rate has decreased considerably due to the use of effective software project management tools and techniques by the software houses. Now more efficient, robust and quantitative measures are being practiced in the areas of software requirement gathering, analysis, design, architecture, development, quality assurance, integration, deployment and support. A number of metrics are used by the requirement engineers, system analysts, software engineers, team leads, software project managers and other professionals to successfully manage, execute and complete the software projects. As the software industry moves towards a more mature state, the need for employing more effective tools, techniques and benchmarks for managing software projects has become indispensable to minimize the negative risk factors and improved adherence to quality assurance. Particularly, requirement metrics are useful in identifying risks of a project by locating errors in the requirements document. These metrics validate the gathered requirements against the actual requirements by evaluating whether the requirements are complete or not. A range of metrics are used for measuring the requirements e.g., volatility metrics check changes in the requirements, traceability evaluates links among the requirements within a document and requirements completeness metrics verifies whether the specified requirements are complete or not. Multiple metrics are recommended to be used to assess the health of a software project to ensure overall quality as a single metric cannot suffice. In this paper, we explore how different metrics relating to different areas of software project, especially in requirement engineering, can be useful to manage the software projects for knowledgeably. The focus of this research study is to evaluate and highlight the importance of various performance metrics and propose additional metrics for requirement gathering and management.
Automatic Extraction and Integration of Changes in Shared Software Specifications
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.29-46
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Collaborative development has been identified as one of the most important keys to the success of a software project. An effective collaboration has a great impact on the requirements specification phase since the latter involves several people specifying the requirements of various stakeholders. Such collaboration requires automatically detecting the parallel changes or revisions that are made to a shared specification. These revisions are aimed at reaching a specification that satisfies the needs of all the stakeholders. Hence, combining these changes systematically must also incorporate the detection and resolution of any merging conflicts in order to commit them properly to the shared specification leading to a sound and consistent result. A new approach is proposed in this paper to extract and integrate the parallel changes made to Object-Oriented formal specifications in a collaborative development environment. A formal foundation is proposed to uniformly define merging conflicts and the proposed approach allows combining the parallel changes made while addressing any merging conflicts at the same time. Evaluating the developed algorithms has shown good signs in terms of accuracy and scalability.
A Novel Hybrid Approach for Efficient Network Utilization of OBS
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.47-60
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Optical Burst Switching (OBS) is one of the most important switching technologies for future IP over wavelength division multiplexing (WDM) networks. In OBS Network, the burst assembly technique is one of the challenging issues in the implementation of the system. It has the influence on the burst characteristic, which gives an impact on the network performance. In this paper, an efficient hybrid burst assembly approach based on approximate queueing network model has been proposed. An approximate queueing network model has been used to reduce the time complexity in comparison to exact model. Throughput performance is investigated taking into account both burst loss probability and the time complexity of the proposed approach. Simulation results indicate that the hybrid approach based on variable burst length threshold and fixed maximum time limitation provides the lowest loss probability and assembly delay time as compared to conventional techniques. Estimation results show that burst buffering delay is reduced and needless bandwidth reservation is prevented. The hybrid approach utilizes Latest Available and First Fit Unused Channel with Void Filling (LA-FFVF) scheduling algorithm for resource reservation. Results represent a good trade-off between burst blocking performance and scheduling time.
Software Failure Analysis at Architecture Level using FMEA
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.61-74
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
The advancement and proliferation of information technology has made it possible for specified functions of systems including safety-critical systems to be software driven. Traditional failure analysis techniques existed before computers and are widely used in the failure analysis of hardware. Typically, hardware failures are random while software failures are systematic and this makes software failure analysis difficult to be addressed. However, similar approaches used in hardware failure analysis can be applied in the failure analysis of software at its architecture level. Such analysis informs design modifications in software and likely hardware to mitigating design weaknesses. This paper investigates this approach by employing the use of FMEA and emphasizes on the commencement of failure analysis at early system design stage. Thus, weaknesses in the design can be identified early and necessary interventions taken. The FMEA investigates failure of each entity of the architecture relative to a defined system top event.
Enhance Rule Based Detection for Software Fault Prone Modules
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.75-86
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Software quality assurance is necessary to increase the level of confidence in the developed software and reduce the overall cost for developing software projects. The problem addressed in this research is the prediction of fault prone modules using data mining techniques. Predicting fault prone modules allows the software managers to allocate more testing and resources to such modules. This can also imply a good investment in better design in future systems to avoid building error prone modules. Software quality models that are based upon data mining from previous projects can identify fault-prone modules in the current similar development project, once similarity between projects is established. In this paper, we applied different data mining rule-based classification techniques on several publicly available datasets of the NASA software repository (e.g. PC1, PC2, etc). The goal was to classify the software modules into either fault prone or not fault prone modules. The paper proposed a modification on the RIDOR algorithm on which the results show that the enhanced RIDOR algorithm is better than other classification techniques in terms of the number of extracted rules and accuracy. The implemented algorithm learns defect prediction using mining static code attributes. Those attributes are then used to present a new defect predictor with high accuracy and low error rate.
Reducing Packet Loss for Mobile IPv6 Fast Handover (FMIPv6)
보안공학연구지원센터(IJSEIA) International Journal of Software Engineering and Its Applications Vol.6 No.1 2012.01 pp.86-92
※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.
Mobile IPv6 enables a mobile node to maintain its connectivity to the Internet when moving from one Access Router to another, a process referred to as handover. Handover involves link switching, which may not be exactly coordinated with fast handover signaling. The arrival pattern of packets is dependent on many factors, including application characteristics and network queuing behaviors. Hence, packets may arrive at the NAR before the MN is able to establish its link there. These packets will be lost unless they are buffered. If MN attaches to the NAR and then sends an FBU message, packets arriving at the PAR until the FBU are processes will be lost unless they are buffered. This paper introduces ways on how to reduce packet loss in Mobile IPv6 Fast Handover.
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