Earticle

스마트폰의 급속한 보급 확산에 따라 모바일 기기에서 웹 브라우저는 주요한 기능으로 자리 잡고 있으며 사용자는 모바일 기기에서 PC 수준의 고속화된 성능을 기대하는 현실이다. 웹키트(WebKit)는 구글의 안드로이드(Android) 플랫폼에 사용되고 있는 웹 브라우 저를 만드는 데 기반을 제공하는 오픈 소스 응용 프로그램 프레임워크이다. 본 논문에서는 WebKit 라이브러리의 연산의 병렬처리 를 통한 성능 향상 기법을 제안하였다. 제안된 병렬처리 기법은 JPEG 라이브러리에 적용되었으며, 성능 검증은 PC 기반의 실험을 통하여 이기종 컴퓨팅 기반의 모바일 임베디드 시스템 환경에서의 예측 방법을 사용하였다. 실험 결과는 제안된 병렬화 기법이 이기종 컴퓨팅 환경의 모바일 임베디드 기기로의 적용을 통한 성능 향상 가능성을 보여주었다.

As the growing popularity of smartphones, mobile web browsing has become one of the most important and popular applications in mobile devices. Furthermore, it is clear that the demand for PC-like full browser performance on mobile devices is increasing greatly. WebKit is an open source web browser engine adopted by Google Android. This paper proposed a technique of increasing the performance of WebKit by paralleling its libraries. This method was applied to JPEG library and the performance evaluation was conducted in PC environment. The results was used to estimate the performance prediction on multi-core mobile embedded architecture and to show the feasibility of the proposed method to estimate the performance gain on heterogeneous multi-core embedded architecture.

MMORPG 게임은 수천명의 동시접속자가 상당한 양의 요청을 게임서버에 전송한다. 이는 게임서버에 경합을 유발하고 예기치 못한 지연시간을 제공한다. 느린 응답시간은 사용자 이탈로 이어지기 때문에, 수준 높은 게 임 서버 디자인이 요구된다. 본 연구에서는 컴퓨팅 자원들을 최대한 활용하여 안정적인 응답시간을 제공하는 멀티 쓰레드 게임 서버 디자인을 제안한다. 해당 서버는 클라이언트와 서버 사이의 통신을 돕는 socket system, 게임 캐릭터들의 상태 변화를 처리하는 task system, 그리고 사용자들이 동일한 게임 환경을 제공받을 수 있도 록 하는 synchronization system으로 구성되어 있다. 심각한 경합을 예방하기 위하여, 프로세스 동기화를 위한 Lock, Lock-free 알고리즘을 모두 적용하였으며, 시야처리와 같은 여러가지 병렬 프로그래밍 접근 방식을 도입 하였다.

Massively Multiplayer Online Role-Playing Game(MMORPG) attract thousand of concurrent users, leading to a surge in server requests. The massive requests results in contention on the game server, causing unexpected latency issues that undermine user experience. Delayed latency leads to user dissatisfaction and, ultimately, user churn. In this paper, we propose a multi-threaded game server design that provides stable response time by utilizing computing resources. And we study the performance of the design under various environments by configuring the approaches we implemented. The server consists of a socket system that helps communicate between clients and servers, a task system that handles changes in the status of user, and a synchronization system that allows users to receive the same game information. To prevent serious contention, both lock and lock-free algorithms for process synchronization are applied, and some parallel programming approaches such as visual processing are introduced.

이기종 처리환경은 이종의 CPU/GPU가 혼재하는 다처리 환경으로서 빠른 연산속도를 필요로 하는 다양한 응용 분야에서 리 사용되고 있다. 이러한 이기종 처리환경은 CPU/GPU/APU등 로세서를 통합리하여 데이터 공 유가 가능하며 력, 소형화, 고성능을 지향하는 계산 환경변화에 따라 이기종 처리 시스템은 지속으로 발하 고 있다. 여러 가지 응용분야 상처리는 이기종 환경에 가장 합하다. 필터링, 보간, 히스토그램 계산과 같은 상처리 련 연산은 공유 지역 메모리를 효율으로 사용할 수 있는 연산이므로 특별히 이기종 처리 시스템에서 효 과가 극화 된다. 본 논문에서는 이기종 처리 시스템에서의 공유 메모리가 가지는 효과를 소개하고 공유 메모리를 사용하는 상처리 기능을 통해 캐쉬 공유가 효율임을 보이고 이를 통해 CPU와 GPU간의 효율인 작업을 분배 방법을 제안한다.

Heterogeneous processing systems are multi-processing environment containing heterogeneous CPU and GPU. They are widely used in a variety of areas that require fast computation speed. Recently, it is becoming possible to share address space and data through the integration of GPU and CPU. Furthermore, on-die integration of GPU architecture is developing as low power consumption, miniaturization and high performance are becoming more important. Operations in image processing such as filtering, interpolation, and histogram computation can efficiently use shared local memory and applying it to the on-die integration of GPU system in which CPU and GPU share the memory and address system can maximize the effect of those systems. We introduced the study of the effects of shared memory in the existing on-die integration of GPU system, we propose a method of efficient workload distribution between CPU and GPU by measuring the efficiency of cache sharing through image processing operations that use the shared local memory space.

기호적 회귀분석 (Symbolic Regression)은 회귀분석에서 주어진 데이터에 대하여 종속변수와 독립변수들 사이 의 관계를 설명할 수 있는 함수를 직접 생성하는 분석방법으로서 Genetic Programming 이 본 분야의 연구에 가장 선도적으로 적용되고 있으며, 고정된 모델로부터 매개변수들의 최적화를 추구하는 다른 회귀분석 알고리즘들에 비하여 해석이 가능한 모델을 직접 도출할 수 있다는 장점을 갖는다. 본 연구에서는 Coarse grained 병렬 모델에 기반한 Parellel Genetic Programming 을 이용한 symbolic regression 알고리즘을 제시하고 제시된 알고리즘을 PMLB 데이타에 적용하여 해당 알고리즘의 효용성을 분석하고자 한다.

Symbolic regression is an analysis method that directly generates a function that can explain the relationsip between dependent and independent variables for a given data in regression analysis. Genetic Programming is the leading technology of research in this field. It has the advantage of being able to directly derive a model that can be interpreted compared to other regression analysis algorithms that seek to optimize parameters from a fixed model. In this study, we propse a symbolic regression algorithm using parallel genetic programming based on a coarse grained parallel model, and apply the proposed algorithm to PMLB data to analyze the effectiveness of the algorithm.

Sparse matrix-vector multiplication (SpMV) is a key linear algebra algorithm and is widely used in many application domains. Besides multi-core architecture, there is also extensive research focusing on accelerating SpMV on many-core Graphics Processing Units (GPUs). SpMV computations have many indirect and irregular memory accesses, and load imbalance could occur while mapping computations onto single-instruction, multiple-data (SIMD) GPUs. SpMV is highly memory bandwidth-bound, though GPUs have massive computational resources, the performance of SpMV on GPUs is still unsatisfying. In this paper, we present a new hybrid strategy for auto-tuning SpMV on GPUs. Our strategy combines the advantages of row-major storage and column-major storage. Like many other strategies, we reordered a given sparse matrix according to row lengths in decreasing order. In order to be more adaptive and efficient, we proposed a new hybrid Blocked CSR and JDS (BCJ) format based on original CSR and JDS. BCJ splits a sparse matrix into a denser part and a sparser part after reordering and uses different kernels to process the corresponding part. And we proposed corresponding auto-tuning framework to help transforming matrix and launching kernels according to the sparsity characteristics of the matrix. A CUDA implementation of BCJ outperforms the original formats significantly on a broad range of unstructured sparse matrices.

To improve the research productivity in bioinformatics study by using effective means of large scale data analysis, there are many obstacles that need to be overcome They are standardization of data collection and analysis, management of computing and storage resources, easiness of parallel programming, and efficiency of data analysis job execution, to name a few. Among these, easiness of parallel programming is a crucial factor that contributes to usability and efficiency of large scale data analysis. This paper describes a biologic data analysis platform based on cloud computing infrastructure. The platform provides an easy-to-use parallel data analysis environment, and ultimately enhances the productivity of bioinformatics research.

A hash table is a fundamental data structure implementing an associative memory that maps a key to its associative value. Due to its very fast mapping operation of O(1), it has been widely used in various areas such as databases, bioinformatics, and distributed computing. Besides, the paradigm of micro-architecture design of CPUs is shifting away from faster uniprocessors toward slower chip multiprocessors. In order to fully exploit the performance of such modern computer architectures, the data structures and algorithms considering parallelism become more important than ever. This paper implements three cache-conscious hashing methods, linear hashing and chained hashing, and also, a modern hashing method, hopscotch hashing, and analyzes their performance under Intel 32-core CPU of Nehalem microarchitecture. We implement each hashing method using state-of-the-art techniques such as lock-free data structures, especially based on compare-and-swap (CAS) operations, and refinable data structures. To the best of our knowledge, the work done by this paper is the first work analyzing the performance of three all hashing methods under the same implementation framework. Experimental results using data of 223 (i.e., about eight millions) key-value pairs shows that lock-free linear hashing is the best for insert operation among three hashing methods, and lock-free chained hashing is the best for lookup operation. Hopscotch hashing shows the second best performance of lookup operation. However, hopscotch hash table size is much bigger than other hash table size. Through experiments, we have found that the hopscotch hashing is relatively not efficient than other hash methods.

It is difficult and troublesome to detect data races occurred in an execution of parallel programs. On-the-fly race detection techniques use monitoring to threads and events, which access to shared variables. Any of them using Lamport's happened-before relation needs a thread labeling scheme for generating unique identifiers which maintain logical concurrency information of the parallel threads. Previous labeling schemes for on-the-fly race detection in parallel programs with nested parallelism depend on the nesting depth on every fork and join operation. This paper presents e-NR (Extended Nest Region) labeling in which every thread generates and maintains its label in a constant amount of time and space. Experimental results using OpenMP programs show that presented labeling detects data races more efficiently, because it requires reduced time overhead about 10% and it 3.2 times smaller than previous labeling scheme in average space for race detection.

Previously, parallel computing was mainly used in areas requiring high computing performance, but nowadays, multicore CPUs and GPUs have become widespread, and parallel programming advantages can be obtained even in a PC environment. Various parallel programming frameworks using multicore CPUs such as OpenMP and PPL have been announced. Nvidia and AMD have developed parallel programming platforms and APIs for program developers to take advantage of multicore GPUs on their graphics cards. In this paper, we develop digital image transformation programs that runs on each of the major parallel programming frameworks, and measure the execution time. We analyze the characteristics of each framework through the execution time comparison. Also a constant K indicating the ratio of program execution time between different parallel computing environments is presented. Using this, it is possible to predict rough execution time without implementing a parallel program.

Previously, parallel computing was mainly used in areas requiring high computing performance, but nowadays, multicore CPUs and GPUs have become widespread, and parallel programming advantages can be obtained even in a PC environment. Various parallel programming frameworks using multicore CPUs such as OpenMP and PPL have been announced. Nvidia and AMD have developed parallel programming platforms and APIs for program developers to take advantage of multicore GPUs on their graphics cards. In this paper, we develop digital image transformation programs that runs on each of the major parallel programming frameworks, and measure the execution time. We analyze the characteristics of each framework through the execution time comparison. Also a constant K indicating the ratio of program execution time between different parallel computing environments is presented. Using this, it is possible to predict rough execution time without implementing a parallel program.

Writing parallel programs is not a simple task. Especially, writing parallel programs for a heterogeneous computing environment is even more difficult. Programs written in different programming languages are required to run on different platforms with different operating systems. In this paper, a parallel processing model is presented to allow programmers to write the programs for parallelism in a heterogeneous computing environment. The programs can be written in a sequential programming language that the programmers are familiar with and feel comfortable to write. The model facilitates implicit parallelism and the implementation of the parallelism will be automatically realized in the model. The details of parallelism are hidden from the programmers, thus the programmers can focus on the details of business logics. The programmers are also able to run the programs for simulation.

Redundancy-reliability allocation problems in multi-stage series-parallel systems are addressed in this study. Fuzzy programming techniques are proposed for finding satisfactory solutions. First, a multi-objective programming model is formulated for simultaneously maximizing system reliability and minimizing system total cost. Due to the nature of uncertainty in the problem, the fuzzy set theory and technique are used to convert the deterministic multi-objective programming model into a fuzzy nonlinear programming problem. A heuristic method is developed to get satisfactory solutions for the fuzzy nonlinear programming problem. A Pareto optimal solution is found with maximal degree of satisfaction from the interception area of fuzzy sets. A case study that is related to the electronic control unit installed on aircraft engine over-speed protection system is used to implement the developed approach. Results suggest that the developed fuzzy multi-objective programming model can effectively resolve the fuzzy and uncertain problem when design goals and constraints are not clearly confirmed at the initial conceptual design phase.

The current study presents a zero-one integer programming approach to determine the minimum break point set for the coordination of directional relays. First, the network is reduced if there are any parallel lines or three-end nodes. Second, all the directed loops are enumerated to reduce the iteration. Finally, the problem is formulated as a set-covering problem, and the break point set is determined using the zero-one integer programming technique. Arbitrary starting relay locations and the arbitrary consideration of relay sequence to set and coordinate relays result in navigating the loops many times and futile attempts to achieve system-wide relay coordination. These algorithms are compared with the existing methods, and the results are presented. The problem is formulated as a setcovering problem solved by the zero-one integer programming approach using LINGO 12, an optimization modeling software.

클러스터를 구성하는 단위 노드로 SMP가 새로운 대안으로 시장에 등장하였다. 이러한 멀티프로세서 클러스터(CLUMP)는 하나의 시스템에 다중 메모리 구조를 가지는데, CLUMP가 가지는 다중 메모리 구조를 효과적으로 사용하기 위해서 본 논문에서는 중첩된 병렬화 프로그램 모델을 제안하였다. 중첩된 병렬화 모델은 중첩된 루프 레벨의 병렬화, 중첩된 태스크 레벨의 병렬화, 그리고 다중 중첩된 병렬화로 나뉜다. 본 논문에서는 중첩된 루프 레벨의 병렬화를 실험대상으로 하여 그 성능을 평가하고 단일 메모리 구조의 병렬화 프로그램과 성능을 비교하였다. 실험 결과 시험한 중첩된 병렬화 모델이 단일 메모리 구조의 병렬화 프로그램에 비하여 좋은 성능을 나타내었지만, 실험대상이 된 루프 레벨 병렬화의 잠재적인 특징으로 인해 실행에 참여하는 노드 수가 많아질수록 성능 향상 폭이 감소하는 결과를 보였다. 프로그램의 성능 향상 폭과 확장성은 문제 크기가 클수록 좋은 특성을 보였다.

본 연구에서는 가압경수로 주요 기기의 고정밀 열수력 해석을 위한 CUPID(Component Unstructured Program for Interfacial Dynamics) 코드의 압력장 해석을 위한 이중공액구배법(Bi-Conjugate Gradient) 알고리즘의 병렬화를 SMP(Symmetric Multi Processing) 시스템에서 고찰한다. 비압축성 후향계단 유동문제의 병렬해석을 다양한 격자 조밀도를 가지는 격자들에 대하여 세 가지 대표적인 병렬 기법(MPI, OpenMP, 하이브리드)을 적용하여 병렬성능 비교를 수행하였다. 병렬처리 성능은 해석 문제의 크기뿐만 아니라 캐쉬 메모리 크기에도 영향을 받으므로, 전체 계산량이 매우 적거나 개별 쓰레드에 사용되는 메모리가 캐쉬 메모리보다 매우 큰 경우에는 병렬화에 의한 성능 향상이 낮음을 확인하였다. 또한, 문제 크기에 상관없이 MPI 기법이 OpenMP보다 성능이 우수했으며, 상대적으로 적은 쓰레드를 사용한 경우엔 하이브리드 기법이 가장 우수한 성능을 보였다.

A parallelization of the bi-conjugate gradient solver for the pressure equation of the CUPID (component unstructured program for interfacial dynamics) code, which was developed for analyzing the components of a pressurized water-cooled reactor, was studied in a symmetric multi-processing system. The parallel performance was investigated for three typical parallel programming models (MPI, OpenMP, Hybrid) by solving incompressible backward-facing step flow at various grid resolutions. It was confirmed that parallel performance was low when problem size was small or the memory requirement for each thread was considerably higher than the cache memory. Furthermore, it was shown that MPI was better than OpenMP regardless of the problem size, and Hybrid was the best when the number of threads was relatively small.

매니코어는 단순한 기능을 가진 수백~수천 개 코어를 하나의 CPU에 집적하여 성능을 구현하는 것으로 근본적으로 이를 활용할 병렬프로그래밍이 필요하다. 단순히 속도를 높이는 방향으로 발전하던 하드웨어는 병렬성을 증대하는 방향으로 발전하고 있고 이에 따라 프로그래밍 패러다임 역시 변하고 있다. 병렬화를 위한 여러 기술이 하드웨어에 구현되고 프로그래머가 이를 보다 적극적으로 활용할 수 있게 하는 유용한 병렬프로그래밍 모델이 필요하다. 또한, 컴퓨팅 환경은 자원의 활용도를 중시하는 시스템 중심에서 응용 및 서비스 중심으로 변화하고 있으므로, 그 도메인에 적합하게 프로그래밍할 수 있는 환경이 요구된다. 매니코어에서 병렬시스템 구조를 활용하는 방법을 결정하는 병렬프로그래밍 모델은 그 목적에 유연하게 제공되고 또한 컴퓨팅 환경 변화에 따라 새로운 개념의 모델을 정립하는 데 있어 유용해야 한다.

본 논문은 병렬 프로그래밍 개념 LINDA에서 read()와 in() 프리미티브의 역전에 따른 데드락 문제를 read() 프리미티브를 제거하고 in() 프리미티브와 튜플에 계수(counter) 필드를 추가하는 간편화를 통하여 해결하는 방법에 대하여 기술한다. 기존의 LIMDA 개념에서 read()와 in() 프리미티브의 차이는 전자는 튜플을 읽기만 하고 후자는 읽은 후 그 튜플을 지운다는 점에 있다. 결국 같은 튜플에 대하여 in() 프리미티브가 먼저 실행된다면 read() 프리미티브의 서비스를 요구한 프로세스는 한없이 기다리게 되는 문제가 있다. 따라서 각 프리미티브를 사용해야 하는 시점을 사용자가 주의 깊게 결정해야 하지만 이것이 병렬 프로그램의 개발에서는 그리 쉬운 일이 아니다. 따라서 본 논문에서는 read(0와 in() 프리미티브 2가지를 결합하여 in() 프리미티브 한가지와 튜플에 추가된 counter 필드를 이용하여 이 문제를 해결할 수 있는 방법을 소개한다.

Heterogeneous computing is a technology that utilizes different types of processors to perform parallel processing. It maximizes task processing and energy efficiency by leveraging various computing resources such as CPUs, GPUs, and FPGAs. On the other hand, edge computing has developed with IoT and 5G technologies. It is a distributed computing that utilizes computing resources close to clients, thereby offloading the central server. It has evolved to intelligent edge computing combined with artificial intelligence. Intelligent edge computing enables total data processing, such as context awareness, prediction, control, and simple processing for the data collected on the edge. If heterogeneous computing can be successfully applied in the edge, it is expected to maximize job processing efficiency while minimizing dependence on the central server. In this paper, experiments were conducted to verify the feasibility of various parallel programming models on high-end and low-end edge devices by using benchmark applications. We analyzed the performance of five parallel programming models on the Raspberry Pi 4 and Jetson Orin Nano as low-end and high-end devices, respectively. In the experiment, OpenACC showed the best performance on the low-end edge device and OpenSYCL on the high-end device due to the stability and optimization of system libraries.