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Performance Analysis of Cache-conscious Hashing Techniques for Multi-core CPUs

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  • 발행기관
    보안공학연구지원센터(IJCA) 바로가기
  • 간행물
    International Journal of Control and Automation SCOPUS 바로가기
  • 통권
    Vol.6 No.2 (2013.04)바로가기
  • 페이지
    pp.121-134
  • 저자
    Euihyeok Kim, Min-Soo Kim
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A207653

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원문정보

초록

영어
A hash table is a fundamental data structure implementing an associative memory that maps a key to its associative value. Due to its very fast mapping operation of O(1), it has been widely used in various areas such as databases, bioinformatics, and distributed computing. Besides, the paradigm of micro-architecture design of CPUs is shifting away from faster uniprocessors toward slower chip multiprocessors. In order to fully exploit the performance of such modern computer architectures, the data structures and algorithms considering parallelism become more important than ever. This paper implements three cache-conscious hashing methods, linear hashing and chained hashing, and also, a modern hashing method, hopscotch hashing, and analyzes their performance under Intel 32-core CPU of Nehalem microarchitecture. We implement each hashing method using state-of-the-art techniques such as lock-free data structures, especially based on compare-and-swap (CAS) operations, and refinable data structures. To the best of our knowledge, the work done by this paper is the first work analyzing the performance of three all hashing methods under the same implementation framework. Experimental results using data of 223 (i.e., about eight millions) key-value pairs shows that lock-free linear hashing is the best for insert operation among three hashing methods, and lock-free chained hashing is the best for lookup operation. Hopscotch hashing shows the second best performance of lookup operation. However, hopscotch hash table size is much bigger than other hash table size. Through experiments, we have found that the hopscotch hashing is relatively not efficient than other hash methods.

목차

Abstract
 1. Introduction
 2. Related work
  2.1. Linear hashing
  2.2. Chained hashing
  2.3. Hopscotch hashing
 3. Implementation
  3.1. Lock-free linear hashing
  3.2. Lock-free chained hashing
  3.3. Refinable lock-based hopscotch hashing
 4. Performance evaluation
  4.1. Experimental data and experiment environment
  4.2. Insert operation performance
  4.3. Lookup operation performance
  4.4. Hash table size
 5. Conclusions
 Acknowledgements

키워드

linear hashing chained hashing hopscotch hashing parallel programming lock-free hash tables refinable hash tables multicores Intel microarchitecture compare-and-swap cache friendly

저자

  • Euihyeok Kim [ Department of Information & Communication Engineering, Daegu Gyeongbuk Institute of Science & Technology ]
  • Min-Soo Kim [ Department of Information & Communication Engineering, Daegu Gyeongbuk Institute of Science & Technology ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJCA) [Science & Engineering Research Support Center, Republic of Korea(IJCA)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Control and Automation
  • 간기
    월간
  • pISSN
    2005-4297
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

이 권호 내 다른 논문 / International Journal of Control and Automation Vol.6 No.2

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