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International Journal of Hybrid Information Technology

간행물 정보
  • 자료유형
    학술지
  • 발행기관
    보안공학연구지원센터(IJHIT) [Science & Engineering Research Support Center, Republic of Korea(IJHIT)]
  • pISSN
    1738-9968
  • 간기
    격월간
  • 수록기간
    2008 ~ 2016
  • 주제분류
    공학 > 컴퓨터학
  • 십진분류
    KDC 505 DDC 605
Vol.9 No.12 (35건)
No
31

Workspace and Structural Parameter Analysis for a Novel 3-PRS Parallel Mechanism

Fuwei Sun, Junwei Zhao, Guoqiang Chen

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.9 No.12 2016.12 pp.343-356

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

The working space is one of the important indexes to measure the working capability of parallel mechanism. In this paper, the working space of a new type of 3-PRS parallel mechanism is studied. In the beginning, a novel 3-PRS parallel mechanism is proposed with the kinematics analyzed, and then the working space and volume are obtained by search algorithm, and the working space is drawn using MATLAB. Finally, the influence of the structural parameters on the working space is discussed, which provide theoretical basis for parameter optimization.

32

Implementation of Low Power Test Pattern Generator for Digital Integrated Circuits

Vardhana M, Niju Rajan

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.9 No.12 2016.12 pp.357-366

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

Low power consumption is gaining more significance for design of digital system design. The system has to be operated efficiently by consuming low power, which greatly increases the life of the battery. Every system has to be tested for its performance, before it is released into the market, hence testing is one of the major area of research. Testing of digital system is one of the main and important part in the design and implementation of digital integrated circuits. To ensure that the designed system responds properly, according to the system specification, testing is carried out. The quality of the chip produced will depend upon, how best the testing strategies, or the test vectors are chosen for testing the integrated circuit. The test patterns are generated with the help of automatic test pattern generators. Thus the performance of test pattern generator is very important. In this paper, a low power architecture for generating the test patterns, for testing digital integrated circuits is implemented. Verilog coding is done and is simulated using CADENCE simvision, and the RTL schematic is extracted. The gate level optimization is carried. The power consumed before optimization was found to be 166.79 mw, and the power consumed after optimization was found to be 65.88 mw. This paper presents the VLSI implementation low power test pattern generator. The performance parameters such as area, power and timing are also derived after the analysis.

33

Delay-Bounded Associated Tasks Scheduling Based on Hierarchical Graph Model in the Cloud

Yingchi Mao, Haishing Zhong, Longbao Wang, Xiaofang Li

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.9 No.12 2016.12 pp.367-386

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

Cloud computing can provide the dynamic and elastic virtual resources for the users to execute the large-scale computing tasks. It has become the hot spot in the academic and industry fields. Task scheduling is one of the most important issues in the Cloud. In the Cloud systems, the goal of the tasks scheduling is to spread the workload among the computing nodes and maximize the utilization while the total execution time is within the specific delay bound. At present, almost scheduling algorithms focus on the single task dispatch in the Cloud. Unfortunately, there is little research on the associate tasks scheduling considering the deadline bound. In this paper, two hierarchical task models were discussed and the corresponding associated task scheduling algorithms based on delay-bound constraint (ATS-DB and SAH-DB) were proposed. The associated tasks and the task execution order were represented by one directed acyclic graph (DAG). The proposed hierarchical task models can improve the task execution concurrency. Extensive experimental results demonstrated that the proposed scheduling algorithms, ATS-DB and SAH-DB, can reduce the execution cost and improve the resource utilization within the user-expected delay bound.

34

From the perspective of factor-supply distortion, combining innovation input in investigation into transformation and upgrading of foreign trade in China, network relation between factor-supply distortion, innovation input, macroeconomic environment, foreign trade structure and foreign trade transformation and upgrading were analyzed by constructing structural equation model. Studies have shown that: Factor-supply distortion exerts a negative impact on foreign trade transformation and upgrading by worsening foreign trade structure; innovation input exerts positive impact on foreign trade transformation and upgrading by optimizing foreign trade structure, but innovation input efficiency renders this impact insignificant; interaction between factory-supply distortion, innovation input, macroeconomic environment, foreign trade structure, foreign trade transformation and upgrading results in a stable convergence network system.

35

Parameters Adaptive Control of Uncertain Chaotic Systems

Shujun Liang, Haiyan Liu, Ruiqi Wang, Junwei Lei

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.9 No.12 2016.12 pp.401-410

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

The bound of static uncertain function of chaotic system is required to be known by using adaptive method in many past research papers. Or many papers only considered the situation of the systems with simple uncertain nonlinear functions. In this paper, a kind of generalized chaotic systems are taken as an example, and an adaptive control algorithm with static uncertain nonlinear functions is proposed to control chaotic systems. The requirements for nonlinear function of system is relaxed by using the proposed algorithm. It only requires that the bound of the nonlinear functions in the system model exists and some part of it is known. At last, detailed numerical simulation is done to testify the rightness of the proposed method. It shows that the stabilization and tracking of chaotic system with static uncertain functions can be realized with a quick response by using the proposed algorithm.

 
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