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International Journal of Hybrid Information Technology

간행물 정보
  • 자료유형
    학술지
  • 발행기관
    보안공학연구지원센터(IJHIT) [Science & Engineering Research Support Center, Republic of Korea(IJHIT)]
  • pISSN
    1738-9968
  • 간기
    격월간
  • 수록기간
    2008 ~ 2016
  • 주제분류
    공학 > 컴퓨터학
  • 십진분류
    KDC 505 DDC 605
Vol.4 No.1 (5건)
No
1

Decision Templates with Gradient based Features for Farsi Handwritten Word Recognition

Reza Ebrahimpour, Roya Davoudi Vahid, Babak Mazloom Nezhad

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.4 No.1 2011.01 pp.1-12

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

This paper proposes a new classification method for Farsi handwritten word recognition using a scale invariant gradient based features. The extracted feature vectors classified using MLPs. Outputs of MLPs are then combined by Decision Templates. The experiments were achieved using the Iranshahr dataset. This dataset consist of 780 samples of 30 city names of Iran which 600 samples for train and 180 samples for test was used. A set of experiments were conducted to compare Decision Templates with some combination rules. Results show that template based fusion method is superior to the other schemes.

2

Fuzzy Assisted PI Controller for Pressure Regulation in a Hypersonic Wind Tunnel

Mrs. Rini Jones S.B., P.Poongodi, Mr.Binu L.S

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.4 No.1 2011.01 pp.13-24

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

Wind tunnels have been used to test race cars, fighter planes etc. The hypersonic wind tunnel can hit the hypersonic speeds necessary to test the latest ultra fast aircraft and space planes. The wind tunnel is a major money saver. It allows us to make a reusable prototype and test it in the tunnel for a few hundred thousand dollars. Maintaining constant pressure in the settling chamber of the hypersonic intermittent blow down type wind tunnel is an important task for its effective performance. Here, a fuzzy assisted PI control system for the hypersonic intermittent blow down type wind tunnel is developed and analyzed.

3

Single Training Sample Face Recognition Using Fusion of Classifiers

Reza Ebrahimpour, Masoom Nazari, Mehdi Azizi, Ali Amiri

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.4 No.1 2011.01 pp.25-32

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

This paper deals with Face recognition using Single training sample which is a new challenging problem in machine vision. In the proposed method, first four different representation of face are generated using Gabor filters which vary in angle. Then a Baseclassifier is assigned for each of them and also for original image. Finally EMV technique combines the Base-classifiers. EMV behaves like MV but chooses the vote of the Baseclassifier assigned to original image as winner class when there is multiple winner class. Experimental results on ORL face dataset, show an improvement about 2%, 4% and 5% than 2DPCA, (PC)2A and PCA respectively.

4

Non Linear Cellular Automata in Predicting Heart Attack

P.Kiran Sree, I.Ramesh Babu

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.4 No.1 2011.01 pp.33-40

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

Non Linear Cellular Automata (NLCA) as a modeling tool has received a considerable attention in recent years. Researchers from different fields have proposed various cellular automata models for addressing several problems in bioinformatics, image processing and network security .In this paper we investigate the computational properties of Non Linear Cellular Automata for building versatile and robust CA data based modeling tool for predicting heart attack. In this paper, we investigate the non linear classes of Cellular Automata for predicting heart attack. We are mostly interested in computational properties of Non Linear Cellular Automata with decidable features and regularity. We also propose the framework of special class of non linear cellular automata named as Non Linear Multiple Attractor Cellular Automata (NLMACA). This framework is supported with genetic evolution to arrive at the desired local rules of a non linear cellular automata global function. The performances of the proposed classifier were evaluated in terms of training performances and classification accuracies and the results showed that the proposed classifier has good potential in predicting the heart attack.

5

FOLDED ARCHITECTURE OF SCHEDULER FOR AREA FOLDED ARCHITECTURE OF SCHEDULER FOR AREA

Vilas N. Nitnaware, Shyam S. Limaye

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.4 No.1 2011.01 pp.41-52

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

As the feature sizes of the manufacturing processes is constantly shrinking, the possibility and demand for more functionality on a single chip goes up. This can lead to many problems,e.g. as the memory access bandwidth through the bus gets too low to cope with the demand, also the electrical performance of the bus gets degraded as the number of modules are increased. Our proposed architecture makes use of a switch fabric structure to eliminate the traditional drawbacks of bus based design. Scheduler becomes the integral part of the switch which decides the scheduling of the SOC devices. In this paper, we have proposed an area efficient scheduler which saves around 22 - 26% of the total scheduler area on the silicon die. This becomes possible because the arbiter we designed is capable of executing two different steps of Islip algorithm in two different clock cycles. In the first cycle, it acts as a grant arbiter while the next cycle makes it an accept arbiter. The design is modified using the folding concept which is used to reduce the silicon area by time multiplexing many algorithm operations into a single functional unit. Both the design of the scheduler is synthesized using 90nm SAED library using Design Compiler of SYNOPSYS with the design constraint of input delay, output delay and clock skew. The original scheduler occupies around 22206 area unit while the proposed scheduler occupies around 17285 area unit of the total silicon area considering the constraint of input delay, output delay and clock skew. The area includes both cell area (Combinational + NCombinational) and Interconnect area.

 
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