Earticle

In this paper, we propose a new design metric called modified outage probability (MOP) for protograph-based low-density parity-check (LDPC) codes over the uncorrelated Rayleigh fading channel. In contrast to the conventional threshold metric, the MOP predicts the frame error rate (FER) performance accurately over the fading channel. Based on MOPs, we optimize protograph-based LDPC codes while considering the trade-off between accuracy and computational complexity. It is shown that the optimized LDPC codes outperform the conventional threshold-based LDPC codes at the FER of for the both medium and high code-rate regions.

In this paper, a repeater system is studied which is basically used for the relay in the cellular communication. The LDPC (Low Density Parity Check) code is introduced into DFE (decision feedback equalizer) in the receiver for the BER (bit error rate) performance. For the better quality of service (QoS) and the higher convenience, the wireless repeater was considered for the relay system. In this paper, we propose an efficient equalizer algorithm for the cellular relay system, which uses the DFE combining the LDPC code. The proposed equalizer helps to compensate RF impairments and improve better performance than used independently. In addition, proposed equalizer has less iterative number of LDPC code. So, the proposed equalizer system has low complexity. Therefore, in this paper, BER performance of DFE combining the LDPC code for cellular relay system is satisfied with 4.3dB at 10-4.

차세대 위성 방송 시스템에서는 빠른 전송 효율과 신뢰도 있는 통신에 대한 요구가 지속적으로 증가하고 있다. 전송 효율을 높이고 성능을 향상시키기 위해 새로운 위성 표준 인 DVB-S3 (Digital Video Broadcasting - Satellite - Third Generation) 시스템에서는 Nyquist 전송률 보다 빠르게 전송하는 FTN (Faster Than Nyquist) 방식이 대두되고 있다. 이러한 요구에 맞춰 본 논문에서는 전송 효율 향상을 위한 세 가지 방식에 대한 성능을 비교 분석하였다. 기존의 LDPC 부호기에서 고 부호화율 방식과 LDPC 복호화 과정에서 생선된 check node를 이용하여 bit node를 puncturing시켜 부호화율 증가 시키는 punctured LDPC 방식, 그리고 Nyquist 속도보다 빠르게 전송하는 FTN 방식이 고려된다. 시뮬레이션을 통해, 세 가지 방식을 동일 전송률 관점에서 성능을 비교한 결과 FTN 방식은 동일한 전송 효율을 유지하면서 성능 면에서 가장 효율적임을 확인하였다.

In next generation satellite broadcasting system, requirement of high throughput efficiency has been increasing continuously. To increase throughput efficiency and improve bit error performance simultaneously, FTN method and LDPC codes are employed in new sattelite standard, DVB-S3 system. This paper considered three kinds of methods for increase throughput efficiency. Firstly, as conventional one, high coding rate parity matrix in LDPC encoder is considered. Secondly, punctured coding scheme which delete the coded symbols according to appropriate rules is considered. Lastly, FTN method which transmit fater than Nyquist rate is considered. Among of three kinds of methods, FTN method is most efficient in aspect to performance while maintain same throughput efficiency.

DVB-S2 is the second generation of Digital Video Broadcasting-Satellite and LDPC (Low Density Parity Code) is the key technology in which the decoding plays an important role in determining the performance of DVB-S2 system. According to the research on the characteristics of DVB-S2 standard, this paper reports on the improvement of the Turbo Decoding Message Passing (TDMP) algorithm by adopting the idea of merging. The component codes which don’t have public nodes are regarded as a new component. By changing the decoding order of component codes and removing useless waiting time, the message capacity transmitted between two adjacent component codes is increased. The performance of the proposed TDMP merged decoding algorithm is evaluated by simulation experiments. We measure decoding performance, convergence rate and the average decoding time to evaluate the system performance. The results obtained show that the TDMP merged decoding algorithm ensures the performance of decoding and good convergence, and also improves the average decoding speed and throughput.

In the video coding, the most significant problem is the encoding complexity. It is the distributed video coding (DVC) that the encoding complexity is decreased but the decoding complexity is increased. In the DVC, the encoding complexity is decreased by using the channel coding. Especially, LDPC(A) codes are widely used. In this paper, we introduce a new decoding method for LDPC(A) code improving the error correcting capability for both the AWGN and the DVC channels.

The non-rule circulates LDPC code is the core of the forward-acting error correction code of our country digital television broadcasts in ground DTMB transmission standard. In view of sub block characteristic of this LDPC code generates matrix. It has designed a kind of LDPC encoder based on the linear feedback shift register structure to achieve the LDPC real-time encoding under three different code rates. The whole design occupies 4699 ALUTs, it shorten 20% logical resources compared with same designable project. It fits low complexity DTMB standard transmitter to develop.

In this paper, we propose a puncturing scheme to design low-density parity-matrix (LDPC) codes for unequal error protection (UEP). Two different puncturing schemes are compared. Simulation results show that proposed puncturing scheme outperforms regular puncturing scheme for more important bits. Future work is to find an optimized puncturing patten for UEP irregular LDPC codes.

본 논문에서는 LDPC 코드 대신 LDGM 코드를 이용한 랩터(Raptor) 코드 구성을 제안한다. 그리고 실험을 통하여 두 코드 성능을 비교한다. 시뮬레이션으로 두 코드 성능을 비교한 결과 LDGM 코드를 이용한 랩터 코드가 LDPC 코드를 이용한 랩터 코드보다 성능은 좋지 않았지만 인코딩 복잡도는 더 간단한 것으로 확인되었다.

In this paper, we propose the construction of Raptor code using LDGM code instead of LDPC code as precode. To see their merits, the simulations are done. The results show that the performance in case of using LDGM code is worse than that of using LDPC code as precode, and the complexity of encoding LDGM code is lower than that of LDPC.

In this letter, we study the influence of receiver imperfections on bit error rate (BER) degradations in detecting low-density parity-check coded multilevel phase-shift keying signals transmitted over a Rician fading channel. Based on the analytical system model which we previously developed using Monte Carlo simulations, we determine the BER degradations caused by the simultaneous influences of stochastic phase error, quadrature error, in-phase-quadrature mismatch, and the fading severity.

In this letter, we propose a channel estimation algorithm based on incremental pilots. These are pilots additionally inserted after puncturing the modulated orthogonal frequency division multiplexing (OFDM) symbols to enhance channel estimation performance without lowering bandwidth efficiency. A low-density parity-check code puncturing scheme is also proposed to prevent the performance degradation due to the codeword bit loss caused by punctured OFDM symbols.

Wireless sensor networks(WSN) technology has various applications such as surveillance and information gathering in the uncontrollable area of human. One of major issues in WSN is the research for reducing the energy consumption and reliability of data. A system with forward error correction(FEC) can provide an objective reliability while using less transmission power than a system without FEC. In this paper, we propose to use LDPC codes of various code rate(0.53, 0.81, 0.91) for FEC for WSN. Also, we considered node-to-node interference in addition to AWGN channel. The proposed system has not only high reliable data transmission at low SNR, but also reduced transmission power usage.

The effect of block interleaving in a low density parity check (LDPC)-turbo concatenated code is investigated in this letter. Soft decoding can be used in an LDPC code unlike the conventional Reed-Solomon (RS) code. Thus, an LDPC-turbo concatenated code can show better performance than the conventional RS-turbo concatenated code. Furthermore, the performance of an LDPC-turbo code can be improved by using a block interleaver between the LDPC and turbo code. The average number of iterations in LDPC decoding can also be reduced by a block interleaver.

The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

디지털 비디오 방송표준(DVB-S2)은 순방향 에러 코딩방법으로 BCH와 LDPC을 연결한 시스템을 내부코딩으로 사용한다. DVB-S2에서 LDPC 코드는 11개의 서로 다른 부호화 율을 정의하고 있기 때문에, DVB-S2 LDPC 복호기는 다양한 부호화 율을 지원해야 한다. 11개의 부호화 율 중에서 7가지(3/5, 2/3, 3/4, 4/5, 5/6, 8/9, 9/10)는 균일한 부호화 율이고, 나머지 4가지(1/4, 1/3, 2/5, 1/2)는 비균일 부호화 율이다. 본 논문에서는 균일한 LDPC 코드를 위한 유연한 복호기를 제시한다. 제안된 복호기는 칩의 면적, 메모리의 효율, 처리속도 등에서 많은 장점을 갖는 반 병렬 복호 구조와 변수노드와 체크노드의 내부 연결선을 줄이고 다양한 부호화 율을 지원할 수 있도록 Benes 네트워크를 결합하여 블록크기가 64,800까지 사용가능하도록 설계하였다. 제안하는 복호기는 200MHz에서 193.2MbPs의 처리속도를 갖으며, 면적은 $16.261m^2$이고, 전력은 공급전압이 1.5V에서 198mW의 소모를 보인다.

For forward error correction, DVB-S2, which is the digital video broadcasting forward error coding and modulation standard for satellite television, uses a system based the concatenation of BCH with LDPC inner coding. In DVB-S2 the LDPC codes are defined for 11 different code rates, which means that a DVB-S2 LDPC decoder should support multiple code rates. Seven of the 11 code rates, 3/5, 2/3, 3/4, 4/5, 5/6, 8/9, and 9/10, are regular and the rest four code rates, 1/4, 1/3, 2/5, and 1/2, are irregular. In this paper we propose a flexible decoder for the regular LDPC codes. We combined the partially parallel decoding architecture that has the advantages in the chip size, the memory efficiency, and the processing rate with Benes network to implement a DVB-S2 LDPC decoder that can support multiple code rates with a block size of 64,800 and can configure the interconnection between the variable nodes and the check nodes according to the parity-check matrix. The proposed decoder runs correctly at the frequency of 200MHz enabling 193.2Mbps decoding throughput. The area of the proposed decoder is $16.261m^2$ and the power dissipation is 198mW at a power supply voltage of 1.5V.