Earticle

급변하는 정보화 시대에서 웹사이트에 서비스되는 정보 과잉에 대한 문제들을 접하곤 한다. 정보가 많 아도 쓸모 있는 정보는 없고, 필요한 정보를 선택하는데 불필요한 시간이 많이 소비 된다. 검색 엔진과 같은 여 러 사이트에서는 데이터의 최신 상태 유지를 위해 웹 크롤링을 한다. 웹 크롤링은 대부분 방문한 사이트의 모 든 페이지의 복사본을 생성하는 데 사용되며 검색 엔진은 이렇게 생성된 페이지를 더욱 빠른 검색을 위해 인덱 싱 한다. 많은 데이터 중에 정보가 실시간으로 변경되는 도매정보, 주문정보 등의 제한된 웹 데이터 수집은 일 반적인 주제 중심의 웹 데이터 수집으로 무리가 있다. 현재 제한적 웹 정보를 실시간으로 수집하고 저장하는 방법에 대한 대안이 제시되고 있지 않다. 본 논문에서는 제한된 웹 사이트의 정보를 수집하고, 데이터의 상세 분석을 통한 수집 시간 예측과 분류 작업을 통해 병렬 시스템에 저장하는 웹 크롤링 분산 모니터링 시스템 (R-WCMS)을 제안한다. 실험 결과 웹 사이트 정보 검색을 제안모델에 적용하여 15-17% 시간이 감소됨을 입증 했다.

We face problems from excessive information served with websites in this rapidly changing information era. We find little information useful and much useless and spend a lot of time to select information needed. Many websites including search engines use web crawling in order to make data updated. Web crawling is usually used to generate copies of all the pages of visited sites. Search engines index the pages for faster searching. With regard to data collection for wholesale and order information changing in realtime, the keyword-oriented web data collection is not adequate. The alternative for selective collection of web information in realtime has not been suggested. In this paper, we propose a method of collecting information of restricted web sites by using Web crawling distributed monitoring system (R-WCMS) and estimating collection time through detailed analysis of data and storing them in parallel system. Experimental results show that web site information retrieval is applied to the proposed model, reducing the time of 15-17%.

Grain Stream Cipher 기반의 Light Weight 병렬 알고리즘 연산 방식으로 구현하였다. 제안된 병렬 연산 방식의 알고리즘을 FPGA로 구현하여 동작을 검증하였고, 0.18um CMOS 공정으로 설계하여 UHF RFID 시스템에 적용 가능성을 타진하였다. 제안된 병령 연산 방식의 보안 알고리즘의 설계 및 ASIC 구현 결과를 실제 UHF RFID 표준 프로토콜에 적용하여 현재의 보안 문제 및 복제 방지 기능이 내장된 태그 칩 제작에 활용할 수 있음을 실험을 통해 확인하였다. 0.18um CMOS 공정의 경우에 Radix-16의 경우에도 ASIC 구현 결과 면적 및 전력소비에서도 UHF RFID 시스템에 적용 가능함을 확인하였다.

We have implemented a parallel operation of the Light Weight algorithm based on Grain Stream Cipher authentication algorithm for UHF RFID systems. We also verified parallel operation algorithm by Verilog coding and ASIC implementation of the Radix-1, 2, 4, 8 and 16 structures using a 0.18um CMOS process. The implemented results show that proposed parallel architecture can be used for design of UHF RFID tag for anti-cloning protection or authentication. We have verified that chip area and power consumption of the Radix-16 designed by 0.18um CMOS process can be applied to the UHF RFID tag design.

멀티 코어 프로세서의 보급 확산으로 최근에는 임베디드 시스템에서도 채택되고 있다. 따라서 일반적으로 대규모의 컴퓨팅과 메모리 접근을 필요로 하는 멀티미디어 응용은 멀티 코어 플랫폼 기반의 병렬화가 가능하다. 본 논문에서는 멀티 코어 CPU을 이용한효율적 색 공간 변환을 위한 스레드 수준 병렬 기법의 성능 향상을 검증하였다. 스레드 수준 병렬화 특히 멀티 코어 프로세서기반공유 메모리 컴퓨팅 시스템에서는 매우 유용한 병렬 처리 패러다임이 되고 있다. 본 구현에서 스레드 수준 병렬화는 각 스레드에다른 입력 픽셀을 할당하여 실행하였다. 성능 평가를 위해 직렬 및 병렬 구현들 사이의 처리 속도의 비교에 기초하여 대표적 멀티코어 프로세서에서 색 변환을 위한 성능 향상 정도를 평가하였다. 결과는 스레드 수준의 병렬 구현에 관계없이 다른 멀티 코어에서전반적으로 비슷한 성능 향상의 비율을 보여주었다.

With the increasing popularity of multi-core processors, they have been adopted even in embedded systems. Under thiscircumstance many multimedia applications can be parallelized on multi-core platforms because they usually require heavycomputations and extensive memory accesses. This paper proposes an efficient thread-level parallel implementation for colorspace conversion on multi-core CPU. Thread-level parallelism has been becoming very useful parallel processing paradigmespecially on shared memory computing systems. In this work, it is exploited by allocating different input pixels to eachthread for concurrent loop executions. For the performance evaluation, this paper evaluate the performace improvements forcolor conversion on multi-core processors based on the processing speed comparison between its serial implementation andparallel ones. The results shows that thread-level parallel implementations show the overall similar ratios of performanceimprovements regardless of different multi-cores.

OpenCL (Open Computing Language) is a heterogeneous programming framework for developing applications that executes across a range of device types made by different vendors[11] which efficiently maps to both heterogeneous and homogeneous, single or multiple device system consisting of CPUs, GPUs and others types of devices. OpenCL provides many benefits in the field of high-performance computing and one of the most important aspects is its portability. This paper presents a comparison of the performance of OpenCL executing a matrix multiplication over a manycore CPU and GPU with performance analysis. The analysis are carried out to understand manycore CPU and GPU performance characteristics. Such analysis approach can be further extended to include more system parameters and refined to fit the actual execution time of parallelized applications. The simulation uses Ubuntu 12.04 in a desktop with an Intel i7 960 processor and a graphic card Nvidia GeForce GTX 460.

This research contributes to the on-going research effort by exploring alternate methods for soft computing optimization the highly nonlinear and uncertain systems. This research addresses two basic issues related to the control of an uncertain system; (1) design of a robust feedback controller, and (2) the design of a parallel artificial intelligence based optimization to increase the result qualification. The robust backstepping controller proposed in this research is used to further demonstrate the appealing features exhibited by the continuum robot. Robust feedback controller is used to position control of continuum robot in presence of uncertainties. Using Lyapunov type stability arguments, a robust backstepping controller is designed to achieve this objective. The controller developed in this research is designed in two steps. Firstly, a robust stabilizing torque is designed for the nominal continuum robot dynamics derived using the constrained Lagrangian formulation. Next, the fuzzy logic methodology applied to it to solution uncertainty problem by parallel optimization. The fuzzy model free optimization is formulated to minimize the problem of nonlinear formulation of uncertain systems.

Intelligent Transportation Systems (ITS) is one of the important application areas of the Internet of Things (IoT). The key issue is how to process the huge events generated by IoT system to support ITS. In this paper a proactive parallel complex event processing method is proposed for congestion control in large-scale ITS. A Bayesian model averaging method is used to obtain accurate predictions under different event context. Based on the predictive analysis, a parallel Markov decision processes model is designed to support decision making for large-scale ITS. An optimized parallel policy iteration algorithm is proposed based on state partition and policy decomposition. The experimental evaluations show that this method has good accuracy and scalability when used to process congestion control in large-scale ITS.

최근 빅데이터 기반 서비스의 증가는 다수의 프로세스가 고용량의 데이터를 송수신하면서 협력하는 실행 구조의 확산을 가져왔다. 프로세스 간 데이터를 비동기적으로 송수신하도록 도와주는 분산 메시지 큐 시스템은 상기 실행 환경 에서 중요한 역할을 수행한다. 양 프로세스 간 동기적 데이터 송수신은 동기화 과정에서 상당한 비효율성을 지니기 때문 에 데이터를 생산/소비하는 프로세스와 별개로 데이터를 풀링(Pooling)해주고, 상시로 데이터를 소비할수 있도록 해주 기 때문에 데이터 공유가 용이해 지기 때문이다. 대표적인 분산 메시지 큐 시스템인 Apache Kafka는 단일 토픽 (Topic)에 대해 유입되는 메시지를 다수의 파티션으로 분산하여 저장할 수 있도록 한다. 파티션은 데이터를 저장하는 독립적인 플로우(Flow)에 대한 추상화 이상적으로는 그 수가 증가하면 메시지 큐의 처리량도 선형적으로 증가해야 한다. 본 논문에서는 파티션에 의존하는 현재의 Kafka 확장성(Scalability) 보장 방식이 실효성을 지니는지 다양한 실험을 통 해 관찰한다. 실험 결과 파티션의 증가가 처리량을 개선시키는 데에 효과는 있으나 자원이 충분함에도 불구하고 선형적 인 증가는 이끌어내지 못하는 것을 관찰하였다. 이것은 파티션이라는 독립적인 데이터 스트림을 나타내는 추상적 개념을 구현할 때 그 독립성을 충분히 확보하지 못하는 것으로 판단된다. 향후 본 논문에서 분석한 실험 결과를 바탕으로 파티 션을 통한 고병렬성 데이터 스트림 지원을 방해하는 요소를 구체적으로 분석하고 이를 개선하는 방안을 제안하고자 한다.

The growth of big data services has expanded execution structures where multiple processes share large data volumes. Distributed message queue systems like Apache Kafka, which enable asynchronous data sharing, are essential here. Apache Kafka allows incoming messages for a single topic to be distributed and stored across multiple partitions. A partition represents an abstraction for an independent data flow, and ideally, as the number of partitions increases, the message queue’s throughput should scale linearly. In this paper, we examine through various experiments whether Kafka’s current scalability approach, which relies on partitions, is effective. Experimental results reveal that while increasing partitions improves throughput, it fails to achieve linear scaling even when sufficient resources are available. This limitation appears to stem from an inability to fully maintain independence in the implementation of partitions, which are intended to represent independent data streams. Building on these findings, we aim to analyze in detail the factors that hinder high-parallelism data stream support via partitions and propose methods to address these issues.

In this paper, we consider the series and parallel system which include two components. We assume that the lifetimes of two components follow the bivariate Pareto model with random censored data. We obtain the estimators and approximated confidence intervals of the reliabilities for series and parallel systems based on maximum likelihood estimator and the relative frequency, respectively. Also we present a numerical example by giving a data set which is generated by computer.

A series-parallel system with independent but non-identical components is considered. The expressions have been derived for the joint reliability importance (JRI) of m (${\geq}2$) components, chosen from a series-parallel system. JRIs of components of two different series-parallel systems are studied analytically and graphically.

The problem of designing an experiment to estimate the reliability of a system that has N subsystems connected in series where each subsystem n has n $T_n$ components connected in parallel is investigated both theoretically and by simulation. An accelerated sampling sheme is introduced. It is shown that the accelerated sampling scheme is asymptotically optimal as the total number of units goes to infinity. Numerical comparisons for a system that has two subsystems connected in series where each subsystem has two components connected in parallel are also given. They indicate that the accelerated sampling scheme performs better than the batch sequential sampling scheme and is nearly optimal.

Redundancy-reliability allocation problems in multi-stage series-parallel systems are addressed in this study. Fuzzy programming techniques are proposed for finding satisfactory solutions. First, a multi-objective programming model is formulated for simultaneously maximizing system reliability and minimizing system total cost. Due to the nature of uncertainty in the problem, the fuzzy set theory and technique are used to convert the deterministic multi-objective programming model into a fuzzy nonlinear programming problem. A heuristic method is developed to get satisfactory solutions for the fuzzy nonlinear programming problem. A Pareto optimal solution is found with maximal degree of satisfaction from the interception area of fuzzy sets. A case study that is related to the electronic control unit installed on aircraft engine over-speed protection system is used to implement the developed approach. Results suggest that the developed fuzzy multi-objective programming model can effectively resolve the fuzzy and uncertain problem when design goals and constraints are not clearly confirmed at the initial conceptual design phase.

There is a growing interest in hybrid electric vehicles due to environmental concerns. Recent efforts are directed toward developing an improved main component systems for the hybrid electric vehicle applications. Soon after the introduction of electric starter for internal combustion engine early this century, despite being energy efficient and nonpolluting, electric vehicle lost the battle completly to internal combustion engine due to its limited range and inferior performance. Hybrid Electric vehicles offer the most promising solutions to reduce the emission of vehicles. This paper describes a method for cost reduction estimation of parallel hybrid electric vehicle. We used a cost reduction structure that consisted of five major subsystems (three-type and two-type motor) for parallel hybrid electric vehicle. Especially, we estimated the potential for cost reductions in parallel hybrid electric vehicle as a function of time using the learning curve. Also, we estimated the potentials of cost by depreciation.

This paper takes into account the influence of the different impedances of distribution lines on power distribution among inverters when the inverters are paralleled with the droop control method. The impact of distribution lines on the power distribution of inverters can be divided into two aspects. Firstly, since the distributed generators are in low voltage grids, there is resistive impedance in the distribution lines, which will cause control coupling and reduce system stability. The virtual negative resistive impedance of inverters is adopted in this paper to neutralize the resistive element of distribution lines and thus make the distribution line impedance purely inductive. Secondly, after solving the resistive impedance problem, the difference in the inductive impedance value of distribution lines due to the low density of distributed generators will cause an unequal share of reactive power. With regards to this problem, modification is put forward for the droop control strategy to share the reactive power equally. The feasibility of the design is validated by simulation and experimental results.

CRAY 에서 멀티/마이크로 태스킹은 다수의 CPU를 이용하여 계산속도를 증가시키는 하나의 방법이다. CRAY-2 에는 4개의 CPU 가 있으므로 적절히 설계된 알고리즘을 가지고 최대 4배의 speedup을 실현할 수 있다. 저자는 이 논문에서 CRAY-2에서 멀티태스킹/마이트로태스킹 라이브러리를 이용한 2가지의 선형시스템의 해의 병렬화를 제시한다. 하나는 조밀행렬에 대한 가우스 소거법이고 다른 하나는 Radicati di Brozolo가 제안한 준비행렬을 이용한 대형이산 행렬의 반복적 해법이다. 첫째 경우에 크기가 600인 행렬에서 2개의 CPU에 멀티태스킹을 이용하여 1.3의 speedup을 얻었으며 두 번째 경우에서는 크기가 8192인 행렬에서 4개의 CPU에 마이크로 태스킹을 사용하여 3이상의 speedup을 얻었다. 첫째 경우에서는 비균일한 벡터길이 때문에 speedup 이 제한되었다. 두 번째 경우에서는 Radicati 의 테크닉을 혼합한 ILU(0) 준비행렬은 4개의 프로세서에서 상당히 높은 speedup을 얻었다.

Multitasking and microtasking on the CRAY machine provides still another way to improve computational power. Since CRAY-2 has 4 processors we can achieve speedup up to 4 properly designed algorithms. In this paper we present two parallelizations of linear system solution in the CRAY-2 with multitasking and microtasking library. One is the LU decomposition on the dense matrices and the other is the iterative solution of large sparse linear systems with the preconditioner proposed by Radicati di Brozolo. In the first case we realized a speedup of 1.3 with 2 processors for a matrix of dimension 600 with the multitasking and in the second case a speedup of around 3 with 4 processors for a matrix of dimension 600 with the multitasking and in the second case a speedup of around 3 with 4 processors for a matrix of dimension 8192 with the microtasking. In the first case the speedup is limited because of the nonuniform vector lenghts. In the second case the ILU(0) preconditioner with Radicati's technique seem to realize a reasonable high speedup with 4 processors.

안테나 배열을 사용하는 직접 대역 확산 시스템에서 초기 동기 포착을 위하여 안테나 배열을 사용하는 병렬 포착 방식을 제안한다. 제안된 병렬 방식은 단일 안테나를 사용하는 기존의 병렬 방식에 비하여 포착이 가능한 SNR의 범위를 크게 낮출 수 있다. 이를 위하여, 동일한 PN (pseudo-noise) 위상에 해당하는 안테나 배열로부터의 독립된 판정 변수들을 합하여 새로운 판정 변수로 사용한다. 성능분석을 위하여 부가성 백색 가우시안 잡음과 Rayleigh 페이딩 채널하에서 검출확률, 손실확룔, 오인확룔이 유도되며, 이러한 값들을 이용하여 제안된 방식의 평균 포착 성능을 평가한다. 수치적인 분석 결과를 통하여, 제안된 시스템의 성능은 안테나의 개수가 증가함에 따라 지속적으로 향상된다는 사실을 확인할 수 있다.

We propose a parallel acquisition scheme using antenna arrays for initial acquisition of direct-sequence spread-spectrum (DS-SS) signals. The proposed parallel scheme can lower substantially the range of detectable signal-to-noise ratio (SNR) as compared to the conventional parallel scheme with a single antenna. The proposed scheme uses the sum of the independent decision samples from antenna arrays corresponding to an identical subsequence of the pseudonoise (PN) code as a decision variable. We derive the probabilities of detection, missing, and false alarm under an additive white Gaussian noise (AWGN) channel and a flat Rayleigh fading channel. Using these, we get the mean acquisition time of the proposed scheme. From numerical results, we see that the acquisition performance becomes improved continually as the number of antennas increases.

본 논문에서는 고속 병렬 곱셈기에서 속도향상을 위해 부분 곱을 가산하는 과정에 구성되는 CSA(Carry Select Adder) 트리에 새로운 압축기를 적용한 새로운 첫 번째 부분 곱가산(First Partial Product Addition : FPA)를 제안하여 기존의 전가산기를 이용한 병렬가산기보다 부분곱을 계산하는 속도를 약 20% 개선할 수 있게 했다. 새로운 회로는 새로운 FPA 구조를 사용하여 최종 합 CLA 비트를 N/2로 줄인다. 2.5v 0.25um CMOS 기술을 이용하여 제작된 16${\times}$16 곱셈기는 5.14nS의 곱셈 고속을 얻었다. 이 곱셈기의 구조는 파이프라인 설계에 용이하며 고성능을 낸다.

In this paper, we proposed a new First Partial product Addition (FPA) architecture with new compressor (or parallel counter) to CSA tree built in the process of adding partial product for improving speed in the fast parallel multiplier to improve the speed of calculating partial product by about 20% compared with existing parallel counter using full Adder. The new circuit reduces the CLA bit finding final sum by N/2 using the novel FPA architecture. A 5.14nS of multiplication speed of the $16{\times}16$ multiplier is obtained using $0.25\mu\textrm{m}$ CMOS technology. The architecture of the multiplier is easily opted for pipeline design and demonstrates high speed performance.

An Adaptation algorithm is presented and a convergence criterion is derived for parallel model reference adaptive bilinear systems. The output error converges asymptotically to zero, and the parameter estimates are bounded for stable reference models. The convergence criterion depends only upon the input sequence and a priori estimates of the maximum parameter values.