Earticle

Background: Cadmium zinc telluride (CZT) is a promising material because of a high detection efficiency, good energy resolution, and operability at room temperature. However, the cost of CZT dramatically increases as its size increases. In this study, to achieve a large effective volume with relatively low cost, an array structure comprised of individual virtual Frisch-grid CZT detectors was proposed. Materials and Methods: The prototype consisted of 2 × 2 CZTs, a holder, anode and cathode printed circuit boards (PCBs), and an application-specific integrated circuit (ASIC). CZTs were used and the non-contacting shielding electrode method was applied for virtual Frisch-grid effect. An ASIC was used, and the holder and the PCBs were fabricated. In the current system, because the CZTs formed a common cathode, a total of 5 channels were assigned for data processing. Results and Discussion: An experiment using 137Cs at room temperature was conducted for 10 minutes. Energy and timing information was acquired and the depth of interaction was calculated by the timing difference between the signals of both electrodes. Based on obtained three-dimensional position information, the energy correction was carried out, and as a result the energy spectra showed the improvements. In addition, a Compton image was reconstructed using the iterative method. Conclusion: The virtual Frisch-grid CZT detector based on the array structure was developed and the energy spectra and the Compton image were successfully acquired.

본 연구에서는 X-밴드 taper 슬롯구조 능동위상 배열 안테나를 구현하였으며, 구현한 안테나의 성능을 해석하고 측정을 통하여 분석하였다. 제작된 광대역 위상배열 안테나의 능동반사계수 및 능동복사패턴을 측정한 결과를 통하여 설계된 위상배열 안테나의 능동반사계수 및 능동복사패턴 결과와 일치함을 확인하였고, 안테나의 광대역 빔 특성을 검증하여 설계 목표에 부합하는 안테나 구조를 제안하였다.

X-Band taper slot-typed active phased array antenna is studied and designed. Through the simulated and measured performances, it is confirmed that both of active reflection coefficient and active radiation pattern of the designed phased array antenna are agreed well with those of the prototype manufactured one. From this study, the proposed antenna structure is matched to the design target of characteristics of antenna's broadband beam.

본 논문은 다양한 설계하중조건 상태에서 자동채염기 구조설계의 성능분석과 개선을 위해 실험계획법을 이용 한 설계민감도 평가와 대리모델의 특성에 대한 비교연구를 수행하였다. 실험계획법은 수치해석 기반의 직교배열설계 방법을 이용하였다. 설계인자는 주요 구조부재의 두께치수 변수를 고려하였고, 응답치는 중량과 강도성능을 선정하였 다. 직교배열실험을 통해 설계인자 별 응답치에 대한 정량적인 영향도를 분석하였다. 또한 최소의 중량증감으로 구조 성능을 개선할 수 있는 최적의 설계조건을 탐색하였다. 직교배열실험 결과를 이용하여 반응표면모델, 크리깅모델, 그 리고 체비쇼프 직교 다항식과 같은 다양한 대리모델을 생성하였다. 대리모델의 결과를 통해 직교배열실험 결과의 타 당성을 검증하였다. 자동채염기 구조설계 공간 탐색에는 반응표면모델이 가장 적합한 대리모델로 평가되었다.

The paper deals with comparative study of characteristics of surrogate models and sensitivity evaluation using design of experiments in order to enhance and analysis the structure design of an automatic salt collector under various design load conditions. Orthogonal array design based on numerical analysis was used for the design of experiments. The thickness sizing variables of main structure member were considered the design factors, and the output responses were selected from the strength performances as well as the weight. The quantitative effects on responses for each design factor were evaluated from the orthogonal array experiment. Optimum design case was also identified to improve the strength performances with weight minimization. Using the orthogonal array experiment. various surrogate models such as response surface model, Kriging model, and Chebyshev orthogonal polynomial were generated. The orthogonal array experiment results were validated by the surrogate modeling results. The most suitable surrogate model was the response surface model for the exploration of design space of the automatic salt collector.

Aiming to the traditional acoustic detection array with measuring the target coordinate, the accuracy of measurement data is affected by the propagation velocity of the acoustic pressure. This paper proposes a new measurement method, which obtain the mathematical model of the target parameter information when the target passing through acoustic sensor array based on acoustic array structure establish. From the model the target parameter information is just associated with the respective probe element’s delay time of the acoustic pressure when the target passing through the acoustic detector, thereby it is effective to avoid the measurement accuracy influence from acoustic pressure velocity of the target parameter information. In order to obtaining the signal characteristics when the target passing through acoustic detector array, it would adopt time-frequency transform method to analyzed signals of the target through the acoustic array. By the simulation experiment it can improve the measurement precision of the target parameters information, and get frequency-domain characteristics of target information based on the measured analog signals of acoustic pressure. The result is benefit to enhance precision of target parameter information from acoustic array detection system, and it has certain guiding significance for the study of acoustic array structure.

본 논문에서는 다중 위상배열 구조의 위성통신단말 송수신모듈 적용을 위한 핵심부품인 FEM(Front-End Module) MMIC를 구성품인 전력증폭기 (PA: Power Amplifier)와 저잡음증폭기 (LNA: Low Noise Amplifier)를 단 일칩으로 설계하여 제작, 검증하였다. Win-semiconductors사의 화합물반도체 공정인 GaAs PP10 (100nm) 공정을 사용하여 제작하였으며, 전용 시험보드를 이용하여 운용 주파수 대역 7.2-10.5GHz 동작, 출력 1W, 잡음지수 1.5dB 이하의 특성을 확보하였다. 개발된 FEM MMIC는 단일칩으로도 활용이 가능하며, 구성품인 PA, LNA도 각각의 소자로 도 활용이 가능하다. 개발된 소자는 해외 부품의 국산화 대체와 X대역을 사용하는 민수/군수의 다양한 응용분야에서 사용될 것이다.

In this paper, FEM (Front-End Module) MMIC, a key component for the application of the satellite communication terminal transmission and reception module of the multi-phase array structure, was designed and verified as a single chip by designing the Power Amplifier (PA) and the Low Noise Amplifier (LNA). It was manufactured using the GaAs PP10 (100nm) process, a compound semiconductor process from Win-semiconductors, and the operating frequency band of 7.2-10.5GHz operation, output 1W, and noise index of 1.5dB or less were secured using a dedicated test board. The developed FEM MMIC can be used as a single chip, and the components PA and LNA can also be used as each device. The developed device will be used in various applications of Minsu/Gunsu using the X band and the localization of overseas parts.

본 논문에서는 그물망 접지를 갖는 MCAA(Microstrip Comb Array Antenna)에서 그물망 구조의 변화가 MCAA에 미치는 영향을 조사하였다. 우선, 24GHz ISM 밴드에서 MCAA를 설계한 후 접지의 그물망 구조를 변화시키며 MCAA의 이득과 SLL(Side Lobe Level)의 변화를 조사하였다. 이 조사를 위해 그물망의 크기와 그물망 면적에 대한 도체를 제외한 공백의 면적 비인 공백율의 두 변수를 변화시켰다. MCAA는 방사체가 플랫한 MCAA와 방사체가 테이퍼된 MCAA의 두 가지 구조로 조사하였다. 공백율이 증가함에 따라 플랫한 MCAA와 테이퍼된 MCAA 모두에서 이득이 감소했다. 한편, 그물 망 크기의 증가는 공백율 증가보다 안테나 이득을 더욱 극적으로 감소시켰다. 이러한 경향은 안테나 SLL에 대해서도 유사했 으나 테이퍼된 MCAA가 플랫한 MCAA보다 그물망 크기 변화에 대한 영향을 좀 더 심하게 받았다.

In this paper, We investigated the effects of mesh structure variations of meshed ground on MCAA(Microstrip Comb Array Antenna). First, we designed MCAA in 24GHz ISM band and we investigated the variations of the gain and the SLL(Side Lobe Level) of the MCAA as we varied the mesh structure of the meshed ground. We varied two variables, mesh size and unfilled rato, which is defined as no metal area ratio in mesh for the investigation. We investigated two types of MCAA. Those are flat MCAA composed of flat radiator and tapered MCAA composed of tapered radiator. Both the antenna gains of flat MCAA and tapered MCAA are decreased as the unfilled rato increased. However, increase of mesh size made more dramatic decrease in antenna gain than increase of unfilled rato. The antenna SLL showed similar trend. But tapered MCAA affected more severely by variation of mesh size than flat MCAA.

본 논문에서는 1×6 배열 패치 안테나의 복사기 구조와 급전선 브랜치의 각도를 변화시켜 안테나의 특성을 분석하였다. 첫 번째로 복사기 구조를 기존 직사각형 패치를 육각형 패치, 삼각형 패치로 변경하였다. 두 번째로 급전 선 브랜치의 각도를 5∘, 10∘, 15∘, 20∘ 로 변화를 주었다. 브랜치 각도를 10∘ 로 꺾을 경우 측정된 10dB 주파수 대역은 23.38GHz-24.19GHz이고 대역폭은 810MHz이다. 제작된 안테나는 24.05GHz에서 9.65-10.06dBi 이득을 갖는다. 메인로 브의 빔폭은 12∘ 이고, 안테나 크기는 70 ×36㎟이다. 직사각형 패치 외에 다른 모양의 패치를 사용해도 기존 성능을 유지할 수 있으며, 급전선 브랜치를 다양한 각도로 변화시킴으로 배열 안테나 제작에 있어 기판의 크기를 줄이고 제작 상에 다양성에 기여할 수 있음을 확인했다.

In this paper, we analyze the characteristics of the antenna by changing the structure of the radiator and the angle of the branch of the array patch antenna. First, the structure of the radiator was changed from the rectangular patch to a hexagonal patch, a triangular patch. Secondly, we changed the angle of the feeder branch to 5∘, 10∘, 15∘, 20∘. When the branch angle is 10∘, the measured 10dB frequency band is 23.38 GHz-24.19GHz and the bandwidth is 810MHz. The fabricated antenna has a gain of 9.65-10.06dBi at 24.05 GHz. The beam width of the main lobe is 12∘ , and the antenna size is 70 ×36㎟. In addition to the rectangular patch, it is possible to maintain the performance by using patches of other shapes, and it is confirmed that by changing the feeder branch at various angles, it is possible to reduce the substrate size and contribute to diversity in the fabrication of the array antenna.

A new junction-splitting based SAR ADC with a redundant searching capacitor array structure in $0.13{\mu}m$ CMOS process to alleviate capacitor mismatch effects, is presented. The normalized average power has a factor of 0.35 to the conventional SAR ADC at 10-bit conversion accuracy. Statistical experiments show the number of missing codes resulting from the mismatch reduces by 95% for 3% unit-capacitor mismatch ratio, while keeping the conversion energy to that of the conventional JS capacitor array.

In the past decade, the infrared detectors based on intersubband transition in quantum dots (QDs) have attracted much attention due to lower dark currents and increased lifetimes, which are in turn due a three-dimensional confinement and a reduction of scattering, respectively. In parallel, focal plane array development for infrared imaging has proceeded from the first to third generations (linear arrays, 2D arrays for staring systems, and large format with enhanced capabilities, respectively). For a step further towards the next generation of FPAs, it is envisioned that a two-dimensional metal hole array (2D-MHA) structures will improve the FPA structure by enhancing the coupling to photodetectors via local field engineering, and will enable wavelength filtering. In regard to the improved performance at certain wavelengths, it is worth pointing out the structural difference between previous 2D-MHA integrated front-illuminated single pixel devices and back-illuminated devices. Apart from the pixel linear dimension, it is a distinct difference that there is a metal cladding (composed of a number of metals for ohmic contact and the read-out integrated circuit hybridization) in the FPA between the heavily doped gallium arsenide used as the contact layer and the ROIC; on the contrary, the front-illuminated single pixel device consists of two heavily doped contact layers separated by the QD-absorber on a semi-infinite GaAs substrate. This paper is focused on analyzing the impact of a two dimensional metal hole array structure integrated to the back-illuminated quantum dots-in-a-well (DWELL) infrared photodetectors. The metal hole array consisting of subwavelength-circular holes penetrating gold layer (2DAu-CHA) provides the enhanced responsivity of DWELL infrared photodetector at certain wavelengths. The performance of 2D-Au-CHA is investigated by calculating the absorption of active layer in the DWELL structure using a finite integration technique. Simulation results show the enhanced electric fields (thereby increasing the absorption in the active layer) resulting from a surface plasmon, a guided mode, and Fabry-Perot resonances. Simulation method accomplished in this paper provides a generalized approach to optimize the design of any type of couplers integrated to infrared photodetectors.

In this paper, we design an optimal planar array geometry for maximum side-lobe reduction. The concept of thinned array is applied to obtain an optimal two dimensional(2-D) planar array structure. First, a 2-D rectangular array with uniform spacing is used as an initial planar array structure. Next, we modify the initial planar array geometry with the aid of thinned array theory in order to reduce the maximum side-lobe level. This is implemented by a genetic algorithm under some constraint, minimizing the maximum side-lobe level of the 2-D planar array. It is shown that the optimized planar array structure can achieve low side-lobe level without optimizing the excitations of the array antennas.

In this letter, we propose a novel design scheme for an optimal non-uniform planar array geometry in view of maximum side-lobe reduction. This is implemented by a thinned array using a genetic algorithm. We show that the proposed method can maintain a low side-lobe level without pattern distortion during beam steering.

To get rid of cell assembly margin and have more process room of upper substrate, we developed truly COT (Color Filter On TFF Array) LCDs in that B/M (Black Matrix) as well as C/F (Color Filter) layer is located on TFT substrate. Novel B/M material is also developed for this COT structure. Difficulty in making contact hole through C/F layer was solved by making each C/F pattern isolated from others. We think this configuration will be core technology for prominent COT LCDs.

Optimization of the luminance, luminous efficiency, and address voltage margin characteristics has been made on the delta color array PDP with various hexagonal shape subpixels. The optimal subpixel and electrode designs are obtained for the 42-inch high-definition PDP ($1,366{\times}768$) with the fine pixel pitch less than 0.7 mm. The hexagonal delta array structure shows more improved characteristics than that of the normal delta array structure with rectangular shape subpixels.

In this paper, a discrete-time S-dimensional chaos circuit (S = 1,2,3,4,...) with array structure is proposed. By employing array structure which consists of 1-dimensional chaos circuits, the proposed circuit can achieve long working-life. This feature is favorable to exploit as a building block of chaos application systems to get into home electric appliances. Further more, the proposed circuit synthesized using switched-current (SI) techniques is suitable for integration. Concerning the proposed circuit, SPICE simulations are performed. SPICE simulations showed that the proposed circuit can generate the chaotic signals in spite of the fault of the building blocks of the proposed circuit. The proposed circuit is integrable by a standard BiCMOS technology.

For obtaining the best panel quality of color filter on array(COA) architecture in TFF LCD, we investigated the influence of deposition temperature, $O_2$ flow, thickness on the optical transmittance, wet etching and adhesion properties of IZO deposited onto each color photo resist(red, green, blue). Average transmittance of the pixel single layer in the visible range(between 380 and 780nm) was mainly affected by thickness and showed maximum at 1250 ${\AA}$ while the thickness showing peak transparency in each R, G, B wavelength was different. The relation was calculated by using bi-layer transmission and reflectance model, which corresponded to experimental data very well. The adhesion of IZO deposited on each color PR was found to have enhanced value except red PR case, compared to that of IZO which was deposited on $SiN_x$. Wet etching pattern linearity was decreased as the thickness increased. The thickness of IZO was one of vital factors in order to optimize overall pixel process for fabricating COA structure.

A $50{\times}50{\mu}m^2$ aluminum micromirror array is fabricated using surface micromachining technology. $50{\times}50$ micromirrors are arrayed two dimensionally. The micromirror plate is supported by a vertical spring structure that is placed underneath the mirror plate. When the mirror plates reflect a light, the micromirror array un have large effective reflecting area. Fabrication of vertical spring uses only one mask and shadow evaporation process.

This research is the development of a flexible tactile sensor array for service robots using PVDF (polyvinylidene fluoride) film for the detection of a contact state in real time. The prototype of the tactile sensor which has 8${\times}$8 array using PVDF film was fabricated. In the fabrication procedure, the electrode patterns and the common electrode of the thin conductive tape were attached to both sides of the 281$\mu\textrm{m}$ thickness PVDF film using conductive adhesive. The sensor was covered with polyester film for insulation and attached to the rubber base for a stable structure. The proposed fabrication method is simple and easy to make the sensor. The sensor has the advantages in the implementing for practical applications because its structure is flexible and the shape of the each tactile element can be designed arbitrarily. The signals of a contact force to the tactile sensor were sensed and processed in the DSP system in which the signals are digitized and filtered. Finally, the signals were integrated for taking the force profile. The processed signals of the output of the sensor were visualized in a personal computer, and the shape and force distribution of the contact object were obtained. The reasonable performance for the detection of the contact state was verified through the sensing examples.

BCH code is one of the most widely used error correcting code for the detection and correction of random errors in the modern digital communication systems. The conventional BCH encoder that is operated in bit-serial manner cannot adequate with the recent high speed appliances. Therefore, parallel encoding algorithms are always a necessity. In this paper, we introduced a new systolic array type BCH parallel encoder. To study the area and speed, several parallel factors of the systolic array encoder is compared. Furthermore, to prove the efficiency of the proposed algorithm using tree-type structure, the throughput and the area overhead was compared with its counterparts also. The proposed BCH encoder has a great flexibility in parallelization and the speed was increased by 40% than the original one. The results were implemented on synthesis and simulation on FPGA using VHDL.

A 21.6" a-Si:H TFT array for direct conversion X-ray detector with 2480 by 3072 pixels is successfully developed. To obtain X-ray image of satisfactory quality, a novel structure with a storage electrode on BCB is proposed. The structure reduces the parasitic capacitance of data line, which is one of the main sources of signal noise. Also, the structure shows greater resistance to failure than that of the conventional design.