Earticle

본 논문에서는 IT기기에 사용되는 마이너스 전압을 생성할 때 이를 기동하는 기능과 과부하를 감지해 이에 대처하는 기능을 마이크로컨트롤러를 이용해 제어하는 방법을 제시하였다. 이를 위해 기존의 마이너스 전압 생성회로가 가지는 제약점 및 과부하시 발생되는 문제점을 분석하고, 별도의 전류감지 회로 없이 과부하 상태를 검출해 제어하는 방법을 제시하였다. 제시한 방법의 효과를 확인하기 위해 실험회로를 구성하여 실험을 진행한 결과 기존의 마이너스 전압 생성회로에서는 과부하 시 래치-업 상태로 돌입해 회로가 위험한 상태로 진입하는 것에 비해 제시한 회로는 이를 감지해 회로의 동작을 차단하고 이러한 이상상태를 사용자에게 알려 조치를 취할 수 있으며, 회로의 기동시점을 시스템 상태에 맞춰 결정하므로 기동시간이 타임스위치 방식에 비해 약 23%정도로 크게 단축되는 실험결과를 확인하였다.

In this paper, the function of starting the negative voltage used in the IT equipment when it is generated and the method of controlling it using a microcontroller for the function to detect the overload and respond to it are presented. To do this, the limitations of the existing negative voltage generation circuit and the problems that occur during overload were analyzed, and a circuit that detects and controls the overload condition without a separate current sensing circuit was presented. In order to confirm the effect of the proposed method, an experiment was conducted by configuring an experimental circuit. As a result of the experiment, compared to the existing negative voltage generation circuit, which falls into a latch-up state when overloaded and enters a dangerous state, the proposed circuit detects this, stop the operation of the circuit, and informs the user of such an abnormal state to take action. have. In addition, since the starting point of the circuit is determined according to the system state, the experimental result was confirmed that the starting time was significantly shortened by about 23% compared to the time switch method.

본 논문에서는 IT기기를 가동하기 위해 필요한 마이너스 전원을 저렴한 buck 소자를 이용해 안정된 방법으 로 생성할 수 있는 inverter회로의 구성방법을 제시하였다. 이를 위해 기존의 buck 소자를 이용해 inverter 회로 를 구성했을 경우의 문제점에 관해 살펴보고, 이러한 문제점을 방지할 수 있는 원리를 분석하고 해결할 수 있는 회로를 제시하였다. 제시한 방법의 효과를 입증하기 위해 실험회로를 구성하고 실험을 진행한 결과, 기존의 과전류 방지회로에 의한 inverter회로의 기동에 비해 과전류현상 없이 안정된 기동이 이루어짐을 확인하였다. 이에 따라 IT 기기에 사용되는 각종 아날로그 신호 처리를 위한 소자들을 편전원으로 구성하기 위한 수많은 주변소자들이 모두 생략될 수 있으면서도 회로의 성능을 크게 향상시킬 수 있을 것으로 기대된다.

In this paper, a method of constructing an inverter circuit that can generate negative voltage required to operate an IT device in a stable using an inexpensive buck device is presented. To do this, the problem of constructing the inverter circuit using the existing buck device was examined, the principle that could prevent this problem was analyzed, and a circuit that could solve this problem was presented. In order to prove the effectiveness of the proposed method, the experimental circuit was constructed and the experiment was conducted. Compared to the operation of the inverter circuit by the existing overcurrent prevention circuit, it was confirmed that the stable operation was performed without an overcurrent phenomenon. Accordingly, it is expected that the performance of the circuit can be greatly improved while a number of peripheral devices for configuring the devices for processing various analog signals used in IT devices as a single power supply can be omitted.

Synchronized switch damping (SSD) techniques have recently been developed, as an alternative to active vibration control techniques, to address the problem of structure vibration control. In these techniques, a piezoelectric patch is bonded on the vibrating structure and shunted by a network of electrical elements. During the structure motion, the piezoelectric patch is connected and disconnected from the shunt circuit, according to the displacement extremum, through switching action controlled by a digital signal processing system. Thus the voltage in the piezoelectric patch is enhanced and time shifted in the time domain from the displacement of the vibrating structure. This voltage when shunted through electrical circuit results in increased energy dissipation with enhanced damping effect. This paper proposes to further increase the dissipated energy through a new technique called the synchronized switch damping on negative capacitance and voltage sources (SSDNCV). The idea is to further increase the value of voltage in the piezoelectric patch though the use of negative capacitance and two extra voltage sources in the shunt circuit. First theoretical expressions are derived for SSDNCV method to determine the maximum energy dissipated from the shunt circuit and the corresponding maximum damping. The effectiveness of SSDNCV method, as compared to the previous SSD methods, is then demonstrated in the first resonance mode control of a cantilever beam containing piezoelectric patch. The SSDNCV control reduced the vibration amplitude by 82 % as compared to 63 % and 29 % obtained from SSDNCI and SSDV controls respectively.

As the grid voltage of the V/v power supply system for high-speed railway is distorted, the detection method for harmonic and negative sequence current is complex, and there are errors in the detection result. A method is proposed in order to solve these issues, which is capable of carrying out fast and accurately comprehensive compensation for grid current without the PLL circuit. During the detection process, a group of sine and cosine function with arbitrary initial phase angle is needed, the grid fundamental positive sequence voltage is extracted to participate into the detection of fundamental active power component to obtain the command signal. The calculation process is fast and simple and not affected by the distorted grid voltage. The correctness and feasibility of this method is verified by the result of simulation

AIP(arc ion plating)방법으로 CrN 코팅막을 합성하였다. 고분해능 SEM과 AFM 분석들로부터 negative bias voltage에 따른 미세구조의 영향을 나타내었다. negative bias voltage의 증가에 따라 columnar microstructure가 amorphous microstructure로 변화하였다. bias voltage effect에 의해 CrN 코팅막내 입자의 크기가 미세해지고 나노 복합체를 잘 형성하였다.

AIP(arc ion plating)방법과 마그네슘 스퍼터링(DC reactive magnetron sputtering) 방법을 결합시킨 하이브리드 코팅 시스템으로 Cr-Si-N 코팅막을 합성하였다. 고분해능 TEM 및 SEM 분석들로부터 negative bias voltage에 따른 미세구조의 영향을 나타내었다. negative bias voltage의 증가에 따라 columnar microstructure가 amorphous microstructure로 변화하였다. bias voltage effect에 의해 Cr-Si-N 코팅막내 입자의 크기가 미세해지고 나노 복합체를 잘 형성하였다.

This paper proposes a control algorithm for permanent magnet synchronous generator with a back-to-back three-level neutral-point clamped voltage source converter in a medium-voltage offshore wind power system under unbalanced grid conditions. The proposed control algorithm particularly compensates for the unbalanced grid voltage at the point of common coupling in a collector bus of offshore wind power system. This control algorithm has been formulated based on the symmetrical components in positive and negative rotating synchronous reference frames under generalized unbalanced operating conditions. Instantaneous active and reactive power are described in terms of symmetrical components of measured grid input voltages and currents. Negative sequential component of ac input current is injected to the point of common coupling in the proposed control strategy. The amplitude of negative sequential component is calculated to minimize the negative sequential component of grid voltage under the limitation of current capability in a voltage source converter. The proposed control algorithm makes it possible to provide a balanced voltage at the point of common coupling resulting in the generated power of high quality from offshore wind power system under unbalanced network conditions.

Ternary Ti-X-N coatings, where X = Al, Si, Cr, O, etc., have been widely used for machining tools and cutting tools such as inserts, end-mills, and etc. Ti-Al-N-O coatings were deposited onto silicon wafer and WC-Co substrates by a cathodic arc evaporation (CAE) technique at various negative substrate bias voltages. In this study, the influence of substrate bias voltages during deposition on the microstructure and mechanical properties of Ti-Al-N-O coatings were systematically investigated to optimize the CAE deposition condition. Based on results from various analyses, the Ti-Al-N-O coatings prepared at substrate bias voltage of -80 V in the process exhibited excellent mechanical properties with a higher compressive residual stress. The Ti-Al-N-O (-80 V) coating exhibited the highest hardness around 30 GPa and elastic modulus around 303 GPa. The improvement of mechanical properties with optimized bias voltage of -80 V can be explained with the diminution of macroparticles, film densification and residual stress induced by ion bombardment effect. However, the increasing bias voltage above -80 V caused reduction in film deposition rate in the Ti-Al-N-O coatings due to re-sputtering and ion bombardment phenomenon.

- To reduce the phase noise and jitter of the conventional PLL, the proposed PLL uses frequency voltage converter (FVC). The inner negative feedback loop consisting of a voltage controlled oscillator (VCO) and a frequency voltage converter is nested inside a conventional outer PLL loop. When the output voltage (VCO input voltage) of the loop filter changes, the output voltage of the FVC changes in the opposite direction at a much higher sampling frequency in the negative feedback looped VCO. Thus, whenever the VCO output frequency varies, the FVC works as a compensator and it results in VCO noise reduction. It improves the phase noise characteristic and the stability of PLL. It has been simulated and proved by HSPICE in a CMOS 0.18μm 1.8V process. Measurement result of the two-negative feedback loop PLL fabricated in a one-poly six-metal 0.18μm CMOS process shows approximately 20dB improvement at 1MHz offset from 1GHz carrier frequency.

Synchronized switch damping (SSD) techniques have recently been developed for structural vibration control using piezoelectric materials. In these techniques, piezoelectric materials are bonded on the vibrating structure and shunted by a network of electrical elements. These piezoelectric materials are switched according to the amplitude of the excitation force to damp vibration. This paper presents a new SSD technique called 'synchronized switch damping on negative capacitance and adaptive voltage sources' (SSDNCAV). The technique combines the phenomenon of capacitance transient charging and electrical resonance to effectively dampen the structural vibration. Also, the problem of stability observed in the previous SSD techniques is effectively addressed by adapting the voltage on the piezoelectric patch according to the vibration amplitude of the structure. Analytical expressions of vibration attenuation at the resonance frequency are derived, and the effectiveness of this new technique is demonstrated, for the control of a resonant cantilever beam with bonded piezoelectric patches, by comparing with SSDI, SSDVenh, and SSDNC techniques. Theoretical predictions and experimental results show the remarkable vibration damping capability of SSDNCAV technique, which was better than the previous SSD techniques. The broadband vibration control capabilities of SSDNCAV technique are also demonstrated, which exceed those of previous SSD techniques.

The field utilization factor (equation omitted) (the mean electric field / the maximum electric field) of standard sphere gaps was calculated by the charge simulation method, taking into account the ground plane and shanks. n changes mainly with g/r and slightly with 1$_1$, 1$_2$ and 1, where D=2r is the sphere diameter, g is the gap length, 1$_1$ and 1$_2$, respectively, are the lengths of the upper and lower shank, and t is the shank diameter. Generally, (equation omitted) increases as 1$_1$,1$_2$ and t each becomes larger. IEC standard 60052(2002) limits t$\leq$0.2D 1$_1$$\geq$1D and prescribes A=1$_2$＋D＋g where A is the height of the spark point on the upper sphere. Therefore, (equation omitted) is the largest when A=9D and the smallest when A=3D. The simple equation of a straight line, (equation omitted)=1- (g/3r), can generally be used as a representative value of (equation omitted) for a wide variety of sphere diameters that are permitted by the IEC standard. The maximum electric field E$_{m}$ at sparkover of standard air gaps has also been calculated by the relation E$_{m}$=V/(equation omitted)g). E$_{m}$ describes a U-curve for g/r, up to the sphere diameter of 1 m. Moreover, for 1.5-m and 2-m diameters and especially .for negative polarity, sparkover voltages have been calculated by integration of the ionization index.index.

In this paper, we investigate visible light stress instability in radio frequency (RF) sputtered a-IGZO thin film transistors (TFTs). The oxygen flow rate differs during deposition to control the concentration of oxygen vacancies, which is confirmed via RT PL. A negative shift is observed in the threshold voltage ($V_{TH}$) under illumination with/without the gate bias, and the amount of shift in $V_{TH}$ is proportional to the concentration of oxygen vacancies. This can be explained to be consistent with the ionization oxygen vacancy model where the instability in $V_{TH}$ under illumination is caused by the increase in the channel conductivity by electrons that are photo-generated from oxygen vacancies, and it is maintained after the illumination is removed due to the negative-U center properties.

This paper proposes a point of common coupling (PCC) voltage compensation algorithm using a current limitation strategy for use in distributed generation (DG). The proposed strategy maintains the PCC voltage by prioritizing currents when an output current reference is larger than the current capacity of the power condition system (PCS) of the DG. With this strategy, the DG outputs the active current, reactive current, and the negative sequence current. The DG uses the reactive current for maintaining the PCC voltage within a normal range; the negative sequence current is used for reducing the PCC voltage unbalance. The proposed method was verified using PSIM simulation and experimental results.

To study the characteristics of AC driven OLED, we fabricated the fluorescent OLEDs and analyzed the electroluminescence characteristics of OLEDs with AC negative voltage. The luminance and the current density of the OLED decreased, and the number and size of the dark spots increased in proportion to the duration time and level of the applied AC negative voltage. The current efficiency of the OLED was improved when high AC negative voltage was applied within a short time. When the AC negative voltage of 10 V was applied for 1 minute, the efficiency was improved by 12.4%. Also, the degradation of luminance and current efficiency due to the duration of light emission was improved in the case of OLED applied for 1 minute with 10 V AC negative voltage. These are expected as a result of the improvement of the leakage current characteristics by eliminating the short-circuit region formed by the defect of the OLED at the AC negative high voltage. As a result, the continuous application of AC negative voltage reduced the luminance and the current density of OLED, but the temporary application of AC negative voltage with the proper time and voltage could improve the efficiency and lifetime of OLED.

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

The purpose of this paper is to evaluate the effects of pre-formed space charge by negative DC voltage on partial discharge(PD) patterns of XLPE. We have suggested a modified pulsed electro-acoustic method and demonstrated that the PD patterns are strongly influenced by the pre-formed space charge distributions, which are hardly disappeared up to AC 8kV in electrode configuration including air gap between XLPE layer and electrode.

본 논문에서는 3상 태양광 인버터의 단독 운전 검출 방법을 제안한다. 국내외 규정에서 10MW 미만의 태양광 인버터는 제한된 시간 내에 단독 운전을 검출하여 계통에 에너지 공급을 중단할 것을 요구한다. 제안된 단독 운전 검출 방법은 역상분 전압 주입 후 접속점(PCC, Point of Common Coupling)에서 관측되는 역상분 임피던스의 크기 변화에 근거한다. 제안된 검출 방법의 원리와 구현 기법을 제시하고, IEEE Std. 929-2000을 기준으로 유효성을 검증한다. 제안된 방법은 국내외 규정에서 요구하는 검출 시간 이내에 단독 운전을 검출할 수 있고, 단독 운전을 계통 지락 사고와 구별할 수 있으므로 계통 연계시 요구되는 그리드 코드(Grid code)에 대한 대응도 가능하다.

Sulphur-hexafluoride has extensively been used as an insulating gas of electric power equipment in substation for its high dielectric strength, non-toixity and non-flammable properties. But it is very expensive and is liquidizable under the condition of low temperature and high pressure. And it is very sensible to the locally high electric field strength. To resolve these problems, we studied 50% FOV and V-t characteristics of $SF_6-N_2$ mixtures under positive and negative lightning impulses using a 25mm rod-plane gap. 50% FOV of $SF_6-N_2$ 50% mixture was about 85% of pure $SF_6$ and it was known that $SF_6-N_2$ mixtures can be used as an economic substitution insulating gas for $SF_6$.