Earticle

초록

영어

This manuscript presents the designing and investigative aspects of a low power, wide frequency range, and delay cell based 3 and 5-stage ring oscillator for RF-Ultra-Wide-Band application. The wide range of frequency is achieved by using two variable voltage sources i.e. control voltage source (Vcntrl) and tail current source (Vtail). A tail current improvement is responsible to control the charging and discharging time of oscillator. Moreover, the push-pull configuration is also used to attain high frequency. In addition, the proposed work presents the effect of control voltage and tail current source on the oscillator frequency. This work establishes a relation between oscillator frequency and its power consumption. This work also gives a comparison between 3-stage and 5-stage ring oscillator. The circuit is implemented in 180 nm CMOS process provided by TSMC. The designed oscillator is measured to cover a frequency range of 1.3 – 5.7 GHz for 3-stage and 1.99 – 3.12 GHz for 5-stage ring oscillator. The simulated circuit draws 0.510 mW of average power for 3-stage ring oscillator and 0.719 mW average power for 5-stage ring oscillator.

목차

Abstract
 1. Introduction
 2. Proposed Ring Oscillator
 3. Design Consideration
  3.1. Frequency Related Issues
  3.2. W/L Related Issues
  3.3. Power Related Issues
 4. Performance Comparisons between proposed 3 and 5-Stage DTVCRO
 5. Simulation Results
 6. Conclusions
 Acknowledgement
 References

키워드

저자

• Ashish Raman [ Electronics and Communication Department National Institute of Technology, Jalandhar India ]
• R. K. Sarin [ Electronics and Communication Department National Institute of Technology, Jalandhar India ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Advanced Science and Technology

• 간기

  월간

• pISSN

  2005-4238

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605