Earticle

Complications of embedded applications are increasing. Within due time delivery to the market is also a pressure. So, the demand and use of real time operating systems is also increasing. However, it is an redundant fact that the Real Time Operating System (Real Time OS) can significantly degrade the performance. To face performance degradation, a Real-Time Task Manger (RTTM) has been presented in this paper. The Real-Time Task Manger is a hardware based extension to the processor that decreases performance bottleneck attributed to Real Time Operating System. Real-Time Task Manger decreases these performance bottlenecks introduced by Real Time Operating System by its hardware based architecture. The architecture of Real-Time Task Manger is being discussed in this paper provides an aid to deal with some common operations of Real Time Operating System that reason the performance degradation. For example event management, time management, and task scheduling. These operations have a property of some inborn parallelism. The Real-Time Task Manger uses this property to complete these operations in a constant time, and as a result, minimizes the overhead introduced by Real Time Operating System. The proposed architecture yields two benefits: It reduces the processor time taken by Real Time Operating System, and improves the response time to a considerable amount.

With the recent development of spatial information technology, the relative importance of satellite image contents has increased to about 62%, the techniques related to satellite images have improved, and their demand is gradually increasing. Accordingly, a standard processing method for the whole process of collection from satellites to distribution of satellite images is required in many countries for efficient distribution of images and improvement of their utilization. This study presents the processor standardization technique for the preprocessing of satellite images including geometric correction, orthorectification, color adjustment, interpolation for DEM (Digital Elevation Model) production, rearrangement, and image data management, which will standardize the subjective, complex process and improve their utilization by making it easy for general users to use them

The current paper is on a study of the performance estimation fer data processing time and CPU utilization to efficiently develop the real-time system. The analytical modeling and OPNET modeling and benchmarking tests are applied to perform the estimation for data processing time and CPU utilization in real-time system. We demonstrate that the estimation results can be predicted fairly and accurately through the benchmarking test results although there is a small variance between the estimation results and the benchmarking test results.

The current paper is on a study of the performance estimation fer data processing time and CPU utilization to efficiently develop the real-time system. The analytical modeling and OPNET modeling and benchmarking tests are applied to perform the estimation for data processing time and CPU utilization in real-time system. We demonstrate that the estimation results can be predicted fairly and accurately through the benchmarking test results although there is a small variance between the estimation results and the benchmarking test results.

최근 산업 프로세스의 제어 및 모니터링 분야에서 컴퓨터의 사용이 급증하고 있다. 이와 같은 자동차 기어 및 엔진 제어, 항공기 이착륙/운항 제어, 통신 네트워크 등과 같은 응용분야에서 사용되고 있는 컴퓨터는 시간 임계 제어 및 모니터 기능과 시간에 제한적이지 않은 일괄 프로세싱으로 구분된다. 실시간 제어시스템 또는 임베디드 시스템은 컴퓨터 시스템에서 특정한 역할을 수행하는 다양한 하드웨어와 소프트웨어 요소로 구성되어 있다. 실시간 시스템이 시간적 제약조건을 만족하지 못하면 시스템의 오동작이 발생할 수 있으며, 인명 손상과 같은 큰 재앙이 발생할 수 있다. 그렇기 때문에 시스템의 수행은 예측 가능해야 한다. 실시간 임베디드 시스템은 아키텍처 설계 단계에서의 결정이 시스템의 구현과 성능에 매우 큰 영향을 미친다. 유연성이란 실시간 시스템 환경에서 작업 타이밍에 대한 장애를 유연하게 처리할 수 있는 시스템의 처리 능력을 나타낸다. 이 요소는 시스템의 수행비용과 성능을 분석하는 중요한 요소이다. 본 연구에서는 실시간 임베디드 시스템의 구조를 설계할 때 효율적인 분석을 위하여 유연성 함수를 정의한다. 본 연구를 통하여 실시간 시스템의 하드웨어 및 소프트웨어를 분할할 때 속성과 제약을 분석할 수 있는데, 제약의 측면에서 보면 유연성 문제를 해결 할 수 있고, 속성의 측면에서 보면 시스템 모델 및 유연성과 다른 속성들(비용, 전력소비량 등)과의 상호관계 분석 등을 효율적으로 분석할 수 있다.On Flexibility Analysis of Real-Time Control System Using Processor Utilization FunctionJung-Wha Chae†Cheol-Jung Yoo††

The use of computers for control and monitoring of industrial process has expanded greatly in recent years. The computer used in such applications is shared between a certain number of time-critical control and monitor function and non time-critical batch processing job stream. Embedded systems encompass a variety of hardware and software components which perform specific function in host computer. Many embedded system must respond to external events under certain timing constraints. Failure to respond to certain events on time may either seriously degrade system performance or even result in a catastrophe. In the design of real-time embedded system, decisions made at the architectural design phase greatly affect the final implementation and performance of the system. Flexibility indicates how well a particular system architecture can tolerate with respect to satisfying real-time requirements. The degree of flexibility of real-time system architecture indicates the capability of the system to tolerate perturbations in timing related specifications. Given degree of flexibility, one may compare and rank different implementations. A system with a higher degree of flexibility is more desirable. Flexibility is also an important factor in the trade-off studies between cost and performance. In this paper, it is identified the need for flexibility function and shows that the existing real-time analysis result can be effective. This paper motivated the need for a flexibility for the efficient analysis of potential design candidates in the architectural design exploration or real-time embedded system.