Earticle

This paper presents a design methodology of high-temperature superconducting (HTS) magnets. The magnet consists of several double pancake coils with a variety of wire width. This technique, named Multi-Width, is well known to make efficient use of the superconducting wire. It is common for design of high-temperature superconducting magnets to not only reduce wire consumption used, but also consider the homogeneity of the magnetic field. In this paper, we study a design method that efficiently reduces wire usage while considering magnetic field homogeneity. The design is carried out by calculating the critical current and the critical magnetic field according to the configuration of arranging the thickness of the wire to determine the number of windings. The width of wire comprising the magnet was set to 4 – 12 mm, and the number of double pancake coils was set to an even number to consist of top-down symmetry. To verify the validity of the design, we compared the progress of the design code with a complete enumeration survey. As a case study, we designed a magnet that generates a central magnetic field of 3 T or more in a 240 mm bore in diameter. Optimality can be evaluated by weighing wire consumption and field homogeneity according to the magnet's use or user preference.

A rare-earth barium copper oxide (REBCO) superconducting magnet was designed using no-insulation (NI) and multi-width (MW) winding techniques. The proposed magnet is comprised of 58 REBCO-wound single pancake coils with a bore size of 240 mm. When the magnet is operated at 20 K, the center magnetic flux density is designed to reach 3 T with an operational current of 169.55 A, 70 % of its critical current. The critical current was evaluated using experimental data of a short REBCO conductor sample. The designed magnet was then simulated using FEM software with uniform current density model. Magnetic field and mechanical properties of the magnet are evaluated using the simulated data. This magnet was designed as one of the base designs for the project “Tesla-Level Magnets with Large Bore Sizes for Industrial Applications” which was initiated in 2019, and will be wound using REBCO wires with the defect-irrelevant-winding (DIW) technique incorporated to reduce the overall manufacturing cost.

Superconducting magnets have paved the way for opening new horizons in designing an electromagnet of a high field magnetic resonance imaging (MRI) device. In the first phase of the superconducting MRI magnet era, low-temperature superconductor (LTS) has played a key role in constructing the main magnet of an MRI device. The highest magnetic resonance (MR) field of 11.7 T was indeed reached using LTS, which is generated by the well-known Iseult project. However, as the limit of current carrying capacity and mechanical robustness under a high field environment is revealed, it is widely believed that commercial LTS wires would be challenging to manufacture a high field (>10 T) MRI magnet. As a result, high-temperature superconductor together with the conducting cooling approach has been spotlighted as a promising alternative to the conventional LTS. In 2020, the Korean government launched a national project to develop an HTS magnet for a high field MRI magnet as an extent of this interest. We have performed a design study of a 7 T 320 mm winding bore HTS MRI magnet, which may be the ultimate goal of this project. Thus, in this paper, design study results are provided. Electromagnetic design and analysis were performed considering the requirements of central magnetic field and spatial field uniformity.

High-performance and high-reliability gate drivers are essential for fully exploiting the switching capability of wide-bandgap (WBG) power devices. Due to the large voltage differences inherent to high-voltage power stages, robust signal isolation is required to reliably transfer control commands across domains. Inductive or capacitive coupling techniques are typically employed to achieve low-latency isolation, among which inductive coupling offers improved immunity to common-mode transient noise compared with capacitive counterparts. However, when the transmitted pulse width becomes excessively long, conventional inductive-coupling isolators suffer from substantial static current consumption, leading to increased power dissipation and thermal stress. To address these challenges, this work introduces a multi-step pulse-width modulator optimized for low-power isolators. Implemented in a 0.18-μm CMOS process, the proposed scheme conveys data through a short sequence of narrow, adjustable pulses rather than continuous current flow, enabling event-driven operation that substantially reduces average DC current. Post-layout simulations using a highly realistic transformer model with a 105 nH primary inductance and parasitic elements show that the isolator current can be tuned from 5.563 mA to 11.48 mA, significantly lower than the 20.86 mA required by the conventional approach. By lowering power consumption while preserving robust signal transfer, the proposed method supports higher system integration and improved long-term reliability.

A new joint source channel coding reduces both input-width and average current consumption to transmit image data to LCD source drivers. As a source coding, it is based on entropy coding of differential pulse code modulation scheme, especially using median edge detector of image predictor. As a channel coding, it is not a simple pulse amplitude modulation, but linked by source entropy to reduce average amplitude. Simulation results show 1/4 width is achievable by 16-valued transmission with keeping conventional current consumption (0.36 to 1.3).

A two-dimensional numerical investigation is performed to study the influence of slot width of multi-stage stationary floating overtopping wave energy devices on overtopping flow rate and performance. The hydraulic efficiency based on captured crest energy of different device layouts is compared with that of single-stage device to determine the effect of the geometrical design. The results show optimal trends giving a huge increase in overtopping energy. Plots of efficiency versus the relative slot width show that, for multi-stage devices, the greatest hydraulic efficiency is achieved at an intermediate value of the variable within the parametric range considered, relative slot width of 0.15 and 0.2 depending on design layouts. Moreover, an application of adaptive slot width of multi-stage device is investigated. The numerical results show that the overall hydraulic efficiency of non-adaptive and adaptive slot devices are approximately on par. The effect of adaptive slot width on performance can be negligible.

디지털 앰프, 흑은 D급 앰프에서는 기존의 앰프와 달리 펄스 폭 변조(PWM) 방식을 사용한 스위칭을 이용하므로 $90\%$를 상회하는 고효율을 달성한다고 알려져 있다. 하지만, 입력 레벨이 작은 신호가 많은 일반적인 경우에도 전원 전압에 해당하는 큰 전압으로 스위칭하게 되므로 작은 입력 시의 효율은 상당히 떨어진다. 본 논문에서는 기존 앰프보다 효율을 높일 수 있는 4, 5-State PWM 방법을 제시하였으며, 시뮬레이션 결과 기존 PWM 사용 앰프에 비하여 대략 효율이 $40\%$ 상승하여 방열판과 앰프의 크기를 줄일 수 있다. 또한 스위칭 주파수가 기폰 방법 대비 1/2로 감소하므로 디지털 앰프의 실용화에 가장 큰 걸림돌이었던 전자파 방출의 양도 크게 감소한다.

본 논문에서는 다중 반송파 정현 펄스폭 변조방식으로 제어되는 Cascaded H-bridge 멀티레벨 PWM 인버터의 스위칭 손실 저감을 위한 스위칭 패턴을 제안한다. 부하 담당 전력이 상대적으로 큰 H-bridge 모듈의 스위치는 저주파의 기본 출력 전압 레벨을 형성하도록 동작시키며, 부하 담당 전력이 상대적으로 작은 H-bridge 모듈의 스위치는 고주파의 PWM 파형을 기본파에 가감하여 출력전압 파형이 사인파에 가까워지도록 스위칭 패턴을 형성한다. 본 논문에서는 제안된 스위칭 패턴을 PD, APOD 방식의 다중 반송파 정현 펄스폭 변조방식으로 구현하여 Cascaded H-bridge 멀티레벨 PWM 인버터에 적용시키고 실험을 통해 기존의 스위칭 패턴에 비해 스위칭 손실이 개선됨을 증명한다.

다중모드간섭을 이용한 소자는 집적광학에서 광신호의 분리와 결합에 있어서 널리 사용되고 있다. 이러한 소자는 편광상태와 파장에 덜 민감하며, 광 대역폭과 제작 허용오차가 크다는 장점을 가진다. 이러한 다중모드간섭기의 설계에 있어서 간섭기의 폭은 주로 출력단에서의 도파로 폭과 도파로간 간격으로부터 정해져왔다. 본 연구에서는 특별히 광신호의 효율적인 분배를 위해 간섭기의 폭과 관련하여 광 분배기의 손실 및 균일도를 최적화하기 위한 방안을 강구하였으며, 근사적인 이론식에 의한 결과와 비교하였다. (중략)