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A Parallel Video Frame Segmentation Approach on Multicore Processors SCOPUS

Basavaraj Bagewadi, Chaitra Jatti, Richa Koregaonkar, Soumyashree Somasagara, Satyadhyan Chickerur, Pramit Mehta

보안공학연구지원센터(IJCA) International Journal of Control and Automation Vol.7 No.7 2014.07 pp.325-332

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

Image Segmentation is to simplify and/or change the representation of an image into something that is more meaningful and easier to analyze. Pre-processing of the image makes it more clear and visible, while parallelizing of the algorithm optimizes the speed at which the image is processed. This paper presents the performance analysis of parallelizing the video frame segmentation using region growing technique on varying of processors. Region growing Technique is also classified as pixel-based image segmentation method since it involves the selection of initial seed points where determining of whether the pixel neighbors should be added to the region or not is done. The process is iteratively carried out and the region is correspondingly grown for each image. Video is divided into frames, which are passed to different cores. The processing of frames is carried out simultaneously in cores, hence parallelizing the technique. Time analysis for serial and parallel implementation is done. Analysis of time required for processing the frames on different number of cores is carried out.

2

Optimization Using Multicore-Processor Parallelization: A Case Study of Tax Processing System in Indonesia

Antonius Bima Murti Wijaya

보안공학연구지원센터(IJHIT) International Journal of Hybrid Information Technology Vol.6 No.5 2013.09 pp.89-102

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

National Ministry of Manpower of Indonesia stated that statistically, the total of civil servants in January 2013 is 4,467,982 [2]. The total of regency or municipality in Indonesia, based on interior ministry of Indonesia, is 497. Therefore, the average number of civil servants in each regency or municipality is about 9909. Every year, the citizens who have been affected by taxes, including these civil servants, need to create incomes and taxes reports. This processing system was made to help the government to process all salary data for taxes income reports. In improving the speed process of this system can be done in two ways. The first way is by improving computer hardware or algorithm of this system to use effectively the existing hardware such as processor [3]. This research will observe the usage of multithread to process mass data, by considering the bottleneck effect on hard disk. An overlapping method is suggested on this research to exploit the processor resource. The analysis using mathematical method, empirical data, and visualization will be served in this research. The result of this research is that the overlapping method has improved the speed of taxes process system by showing the time reduction until 65.36%.

3

Parallel Multithreaded Processing for Data Set Summarization on Multicore CPUs

Ordonez, Carlos, Navas, Mario, Garcia-Alvarado, Carlos

[Kisti 연계] 한국정보과학회 Journal of computing science and engineering Vol.5 No.2 2011 pp.111-120

※ 협약을 통해 무료로 제공되는 자료로, 원문이용 방식은 연계기관의 정책을 따르고 있습니다.

원문보기

Data mining algorithms should exploit new hardware technologies to accelerate computations. Such goal is difficult to achieve in database management system (DBMS) due to its complex internal subsystems and because data mining numeric computations of large data sets are difficult to optimize. This paper explores taking advantage of existing multithreaded capabilities of multicore CPUs as well as caching in RAM memory to efficiently compute summaries of a large data set, a fundamental data mining problem. We introduce parallel algorithms working on multiple threads, which overcome the row aggregation processing bottleneck of accessing secondary storage, while maintaining linear time complexity with respect to data set size. Our proposal is based on a combination of table scans and parallel multithreaded processing among multiple cores in the CPU. We introduce several database-style and hardware-level optimizations: caching row blocks of the input table, managing available RAM memory, interleaving I/O and CPU processing, as well as tuning the number of working threads. We experimentally benchmark our algorithms with large data sets on a DBMS running on a computer with a multicore CPU. We show that our algorithms outperform existing DBMS mechanisms in computing aggregations of multidimensional data summaries, especially as dimensionality grows. Furthermore, we show that local memory allocation (RAM block size) does not have a significant impact when the thread management algorithm distributes the workload among a fixed number of threads. Our proposal is unique in the sense that we do not modify or require access to the DBMS source code, but instead, we extend the DBMS with analytic functionality by developing User-Defined Functions.

4

주기적 실시간 작업들의 전력 소모 감소를 위한 병렬 수행을 활용한 다중코어 DVFS 스케줄링 기법

박수희

[Kisti 연계] 한국컴퓨터정보학회 Journal of the Korea society of computer and information Vol.19 No.12 2014 pp.1-10

※ 협약을 통해 무료로 제공되는 자료로, 원문이용 방식은 연계기관의 정책을 따르고 있습니다.

원문보기

본 논문에서는 다중코어 프로세서 상에서 주기적 실시간 작업들의 데드라인을 만족하면서 전력 소모량을 최소화하도록 DVFS 기법과 전원 소등 기법을 모두 사용하는 스케줄링 방법을 제안하였다. 제안된 스케줄링 방법은 프로세싱 코어들이 단일 시점에 같은 속도로 동작하는 연관형 프로세서 모델에 적합하도록 설계되었고, 기존 연구에서 해결하지 못한 프로세싱 코어들의 부하불균등 현상을 병렬 수행을 작업들에 적용하여 해소함으로써 전력 소모량을 줄였다. 또한 작업들의 전체 계산량을 고려하여 일부 프로세싱 코어들만을 활성화하여 사용하고 나머지 코어들의 전원은 소등하여 전력 소모량을 줄였다. 전체 프로세싱 코어들 중에서 활성화될 프로세싱 코어들의 개수는 수학적 분석을 통하여 결정되었다. 성능 평가 실험에서 제안된 방법은 기존 방법보다 전력 소모량을 최대 77%까지 감소시킴을 보였다.

This paper proposes a scheduling scheme that enhances power consumption efficiency of periodic real-time tasks using DVFS and power-shut-down mechanisms while meeting their deadlines on multicore processors. The proposed scheme is suitable for dependent multicore processors in which processing cores have an identical speed at an instant, and resolves the load unbalance of processing cores by exploiting parallel processing because the load unbalance causes inefficient power consumption in previous methods. Also the scheme activates a part of processing cores and turns off the power of unused cores. The number of activated processing cores is determined through mathematical analysis. Evaluation experiments show that the proposed scheme saves up to 77% power consumption of the previous method.

 
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