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2

Study of Efficiency of Ka-band IMPATT Diodes and Oscillators around Optimized condition

Tapas Kumar Pal, J. P. Banerjee

보안공학연구지원센터(IJAST) International Journal of Advanced Science and Technology vol.26 2011.01 pp.33-46

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

The device efficiency of a silicon SDR (p+nn+) IMPATT diode at Ka-band has been studied by using small signal simulation and field swing upto 50 % of the maximum dc electric field. It is found that the d.c. to r.f. conversion efficiency of the SDR IMPATT diode decreases with the increase in field swing upto 50 %, from 8.98% to 7.84%. An integrated heat sink cum resonant cap cavity has been used for Ka-band oscillator in the present simulation. RF measurements have been performed on a silicon Ka-band SDR (p+nn+) IMPATT diode embedded in the cavity. Simultaneous electronic and mechanical tuning of the oscillator has been carried out to optimize the frequency and generated r.f. power output over the operating range of input d.c. bias current. An optimized r.f. power output of 180 mW has been obtained from the oscillator with an input d.c. bias current 190 mA. The measured output power has been co-related with theoretical estimated r.f. power obtained from simulation from which the efficiency of the resonant cap oscillator has been obtained.

3

Simple Equivalent Circuit for Efficiency Calculation of Brushless DC Motors

Ishikawa, Takeo, Tsuji, Takuma, Hashimoto, Seiji, Kurita, Nobuyuki

[Kisti 연계] 대한전기학회 분과 Journal of international Conference on Electrical Machines and Systems Vol.3 No.1 2014 pp.54-60

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원문보기

This paper shows a calculation method of several types of loss and the efficiency of brushless DC motors coupled with a load system by using a simple equivalent circuit, in which copper loss, eddy current loss, hysteresis loss, friction loss, viscous loss, and inverter loss are taken into account. We clarify each loss and motor efficiency at different motor speeds and different output torques by using the Microsoft-Excel. Moreover, the calculated results are in good agreement with the measured ones.

4

An Input-Powered High-Efficiency Interface Circuit with Zero Standby Power in Energy Harvesting Systems

Li, Yani, Zhu, Zhangming, Yang, Yintang, Zhang, Chaolin

[Kisti 연계] 전력전자학회 Journal of power electronics Vol.15 No.4 2015 pp.1131-1138

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원문보기

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.

5

A Piezoelectric Energy Harvester with High Efficiency and Low Circuit Complexity

Do, Xuan-Dien, Nguyen, Huy-Hieu, Han, Seok-Kyun, Ha, Dong Sam, Lee, Sang-Gug

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.15 No.3 2015 pp.319-325

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This paper presents an efficient vibration energy harvester with a piezoelectric (PE) cantilever. The proposed PE energy harvester increases the efficiency through minimization of hardware complexity and hence reduction of power dissipation of the circuit. Two key features of the proposed energy harvester are (i) incorporation synchronized switches with a simple control circuit, and (ii) a feed-forward buck converter with a simple control circuit. The chip was fabricated in $0.18{\mu}m$ CMOS processing technology, and the measured results indicate that the proposed rectifier achieves the efficiency of 77%. The core area of the chip is 0.2 mm2.

6

Effect of Cations on the open-Circuit Photovoltage and the Charge-Injection Efficiency of Dye-Sensitized Nanocrys-talline Rutile $TiO_2$ Films

박남규, 장순호, 김강진

[Kisti 연계] 대한화학회 Bulletin of the Korean Chemical Society Vol.21 No.10 2000 pp.1047-1048

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원문보기

Dye-sensitized nanocrystalline rutile $TiO_2$ solar cells were prepared, and the influence of Li+ and 1,2-dimethyl-3-hexyl imidazolium ions in the electrolyte on the photovoltaic properties was compared. The electrolyte con-taining Li+ ions produced a lower open-circuit photovoltage than the electrolyte with 1,2-dimethyl-3-hexyl im-idazolium ions, suggesting that the adsorption of Li+ ions to the rutile $TiO_2$ surface causes a shift in the band edges toward more positive potentials. At the same time, both the short-circuit photocurrent and the maximum value of the incident-photon-current conversion efficiency (IPCE) of the electrolyte containing Li+ ions were relatively higher. Data analysis suggests that presence of adsorbed Li+ ions improves via the phenomenon of band-edge movement the charge-injection efficiency by altering both the energy and number of excited state levels of the dye that participate in electron injection.

7

Efficiency Optimization with a Novel Magnetic-Circuit Model for Inductive Power Transfer in EVs

Tang, Yunyu, Zhu, Fan, Ma, Hao

[Kisti 연계] 전력전자학회 Journal of power electronics Vol.18 No.1 2018 pp.309-322

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원문보기

The technology of inductive power transfer has been proved to be a promising solution in many applications especially in electric vehicle (EV) charging systems, due to its features of safety and convenience. However, loosely coupled transformers lead to the system efficiency not coming up to the expectation at the present time. Therefore, at first, the magnetic core losses are calculated with a novel magnetic-circuit model instead of the commonly used finite-element-method (FEM) simulations. The parameters in the model can be obtained with a one-time FEM simulation, which makes the calculation process expeditious. When compared with traditional methods, the model proposed in the paper is much less time-consuming and relatively accurate. These merits have been verified by experimental results. Furthermore, with the proposed loss calculation model, the system is optimized by parameter sweeping, such as the operating frequency and winding turns. Specifically, rather than a predesigned switching frequency, a more efficiency-optimized frequency for the series-parallel (SP) compensation topology is detected and a detailed investigation has been presented accordingly. The optimized system is capable of an efficiency that is greater than 93% at a coil separation distance of 200mm and coil dimensions of $600mm{\times}400mm$.

8

A High Efficiency and High Power Chopper Circuit QRAS using Soft Switching under Test Evaluation at 8kW

Tsuruta Yukinori, Kawamura Atsuo

[Kisti 연계] 전력전자학회 Journal of power electronics Vol.6 No.1 2006 pp.1-7

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원문보기

This paper is a record of the study on a high efficiency and high power chopper based on the new soft switching method QRAS (Quasi~resonant Regenerating Active Snubber) designed for a Fuel Cell Electric Vehicle (FCEV). This power chopper is basically proposed for 25kHz soft switching. To confirm the practicality and effectiveness of the converter, the fabrication of a prototype-model using IGBTs was completed. Additionally, a 8kW rating test, a light load test, a current discontinuous mode test and a stable operation resonance test was completed. The circuit geometry, the basic operation, and the 8kW one-tenth-prototype test results are reported with a $97.5\%$ efficiency measurement.

9

A High-Efficiency Hybrid Buck-Boost Photovoltaic Energy Harvester with Adaptive Fractional Open-Circuit Voltage Maximum-Power-Point-Tracking Control

판당헝, Van Thai Trinh, 박예찬, 제민규

[NRF 연계] 한국과학기술원 반도체설계교육센터 IDEC Journal of Integrated Circuits and Systems Vol.12 No.1 2026.01 pp.36-42

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원문보기

This paper presents an energy-efficient photovoltaic energy harvesting system achieving an ultra-wide input power (PIN) range by optimizing both maximum-power-point-tracking efficiency (ηMPPT) and power-conversion efficiency (ηCONV). An MPPT based on an adaptive fractional open-circuit voltage method is proposed to tune the fraction k based on PIN with only little power overhead, unlike other complex and power-hungry hybrid MPPTs. Also, the harvester maintains high ηCONV at low PIN levels thanks to its modified hybrid topology that operates as a buck-boost converter with three different control techniques. The proposed zero-current detection circuit reduces the control bit size and response time because it actively changes the tuning resolution according to PIN. The proposed system achieves ηMPPT >98% across a 10,000× PIN dynamic range, and the achieved ηCONV is greater than 81% across the whole range with a peak efficiency of 96.5%. Compared to other previous state-of-the-art works, this design provides the highest peak ηCONV as well as the widest PIN ranges, over which it achieves >98% ηMPPT and >80% ηCONV.

10

Approximate-SAD Circuit for Power-efficient H.264 Video Encoding under Maintaining Output Quality and Compression Efficiency

Le, Dinh Trang Dang, Nguyen, Thi My Kieu, Chang, Ik Joon, Kim, Jinsang

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.16 No.5 2016 pp.605-614

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원문보기

We develop a novel SAD circuit for power-efficient H.264 encoding, namely a-SAD. Here, some highest-order MSB's are approximated to single MSB. Our theoretical estimations show that our proposed design simultaneously improves performance and power of SAD circuit, achieving good power efficiency. We decide that the optimal number of approximated MSB's is four under 8-bit YUV-420 format, the largest number not to affect video quality and compression-rate in our video experiments. In logic simulations, our a-SAD circuit shows at least 9.3% smaller critical-path delay compared to existing SAD circuits. We compare power dissipation under iso-throughput scenario, where our a-SAD circuit obtains at least 11.6% power saving compared to other designs. We perform same simulations under two- and three-stage pipelined architecture. Here, our a-SAD circuit delivers significant performance (by 13%) and power (by 17% and 15.8% for two and three stages respectively) improvements.

11

Process-Variation-Adaptive Charge Pump Circuit using NEM (Nano-Electro-Mechanical) Relays for Low Power Consumption and High Power Efficiency

Byeon, Sangdon, Shin, Sanghak, Song, Jae-Sang, Truong, Son Ngoc, Mo, Hyun-Sun, Lee, Seongsoo, Min, Kyeong-Sik

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.15 No.5 2015 pp.563-569

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원문보기

For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEM-relay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

12

넓은 영전압 스위칭 범위를 갖는 대화면 PDP용 유지 전원단을 위한 고효율 전력 변환 회로

박경화, 이우진, 윤명중, 문건우

[Kisti 연계] 전력전자학회 전력전자학회 학술대회논문집 2005 pp.279-282

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원문보기

Recently, due to the launching of digital broadcasting service, a demand of PDP TV with large screen size is sharply rising. PDP power module is mainly divided into power factor correction (PFC) stage and sustaining power stage. Especially, sustaining power module has pulsating load characteristics. So, the hard switching at light load condition causes low efficiency and thermal problem. Therefore, a new power conversion circuit for sustaining power module of 60' PDP is proposed whose ZVS is obtained by additional ZVS tank. This paper presents properties of the proposed converter through mode analysis, numerical analysis. And a 900w prototype for sustaining power module of 60' PDP is produced to verify the analytic results. As an experimental results, ZVS is achieved from full load to 10% load variation and more than 92% of high efficiency is obtained at 10% load condition.

13

신재생에너지용 연계형 인버터의 고효율 승압에 관한 연구

정태욱, 김주용, 최세권, 조준석, 고희석

[Kisti 연계] 한국조명전기설비학회 한국조명전기설비학회 학술대회논문집 2009 pp.336-339

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원문보기

In this paper, such as battery power or solar energy and fuel cells generated from Renewable energy sources, high voltage to low voltage DC-DC Converter for converting the design of the study. System consists of low voltage ($24{\sim}28$ [VDC]) and Boosts the voltage (270 [VDC]) for a 3 [kW] DC-DC converter and control circuit is configured as, Power switch the ST Tomson's Automotive low voltage high current MOSFET switches STE250NS10S (temperature 250A) was applied to the two parallel. Also, Controller's processor used ATMEGA128, and Gate Drive applies and composed Photo Coupler TLP250. development. Input voltage (24V) and output voltage (270V) for Conversion in the H-bridge converter topology of the circuit output side power and voltage to control the implementation of the Phase shift angle control applied. And, 3kW of power to pass appropriate specification of the secondary side as interpreted by the high frequency transformer, and the experimental production and analysis of the experiment

14

전자독서확대기 사용이 시각장애노인의 읽기 효율성에 미치는 효과: 단일사례연구

이나핼, 장문영, 김경미

[NRF 연계] 한국시각장애교육재활학회 시각장애연구 Vol.28 No.3 2012.09 pp.137-152

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원문보기

본 연구의 목적은 전자독서확대기 사용이 시각장애노인의 읽기 속도, 읽기 정확성에 미치는 효과를 알아보는 데 있다. 연구 대상자는 K시에 거주하는 만 65세 남자로, 황반변성에 의해 시각장애 1급을 진단받았다. 연구 방법은 ABAB 설계(반전설계)로 2011년 11월 8일부터 2011년 12월 3일까지 총 18회기 실시하였다. 본 연구의 결과는 다음과 같다. 첫째, 읽기 속도는 첫 번째 중재 단계가 첫 번째 기초선 단계보다 평균 4.72cpm 증가하였고, 두 번째 중재 단계가 두 번째 기초선 단계보다 평균 16.86cpm 증가하여 전자독서확대기가 읽기 속도에 긍정적인 효과가 있는 것으로 나타났다. 둘째, 읽기 정확성은 첫 번째 중재 단계가 첫 번째 기초선 단계보다 평균 0.67%(6.66글자)증가하였고, 두 번째 중재 단계가 두 번째 기초선 단계보다 평균 4.03%(43.16글자)증가하여 전자독서확대기가 읽기 정확성에 긍정적인 효과가 있는 것으로 나타났다. 본 연구는 시각장애노인의 읽기 재활치료 프로그램의 개발과 읽기 효율성 연구의 기초자료로 제공될 것이다.

The purpose of this study is to investigate the effect of using closed-circuit television on reading speed and reading accuracy of elderly with visual impairment. The subject of this study is 65-year-old man living in the city of K, who was diagnosed with visual impairment level 1 caused by the Macular Degeneration. With the method of ABAB design (reverse design) were conducted a total of 18 sessions from 8 November 2011 until 3 December 2011. The results of this study are as follows: First, the reading speed of the first intervention phase than the first baseline phase increased average 4.72cpm and that of the second intervention phase than the second baseline phase increased average 16.86cpm. There is a positive effect on the reading speed. Second, the reading accuracy of the first intervention phase than the first baseline level increased average 0.67%(6.66 letters) and that of the second intervention phase than the second baseline phase increased average 4.03%(43.16 letters). There is a positive effect on the reading accuracy. This study will be provided of the basis data of reading rehabilitation programs and study for elderly with visual impairment.

15

무인항공기를 위한 3.7V 단일 배터리 셀 고효율 전력관리 회로시스템

강운성, 황선남, 장호정, 김현식

[Kisti 연계] 한국마이크로전자및패키징학회 마이크로전자 및 패키징 학회지 Vol.24 No.3 2017 pp.63-69

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원문보기

본 논문은 드론의 체공시간 증대를 위해 고효율 전력관리 회로 및 시스템을 제안한다. 종래의 드론은 다수개의 직렬 배터리와 낮은 효율의 선형 레귤레이터 사용으로 무겁고 발열이 크며 이로 인한 전력누수 문제가 있었다. 본 논문에서는 3.7V 단일 Li-Po 배터리 셀을 사용할 수 있는 스위칭 방식의 승압형 DC-DC 전력변환 회로에 대한 연구를 다룬다. 본 연구를 통해 시제품 개발 결과 3.7V 입력, 5V 출력의 step-up regulation을 실현하였다. 또한 종래 선형 레귤레이터의 50% 수준이었던 전력효율 대비 최대 91.3% 효율과 $50^{\circ}C$ 이하의 표면온도를 달성하였으며, 0.02V/V 및 0.15V/A의 line/load regulation 성능을 측정으로 검증하였다. 본 연구결과를 통해 3.7V 단일 셀 배터리 사용으로 충방전을 위한 별도의 cell-balancing 회로가 필요하지 않게 되며, 높은 전력관리 효율로 드론의 체공시간을 획기적으로 개선시킬 수 있는 가능성을 확인하였다.

This paper presents a highly efficient power management system for UAV-drones. For free from the battery cell-balancing issue, the proposed system allows the drone to utilize a single-cell Li-Po battery. To realize low-voltage input of 3.7V, the switch-mode step-up DC-DC converter is optimally designed with high power efficiency. The prototype DC-DC converter was implemented with an output voltage of 5V, which will be provided to digital parts of the drone. The power efficiency was measured to be max. 91.3% with low surface temperature. The measured line and load regulations were 0.02V/V and 0.15V/A, respectively. Thanks to the proposed power management system, the available time-to-fly of the drone is expected to be significantly extended in virtue of the enhanced power efficiency.

16

LDO 레귤레이터의 파괴방지 및 효율성을 위한 ESD 보호회로 설계에 대한 연구

이정민, 권상욱, 백승환, 구용서

[Kisti 연계] 한국전기전자학회 Journal of IKEEE Vol.27 No.3 2023 pp.258-264

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원문보기

본 논문에서는 부하전류에 따라 LDO(Low Drop Out) 레귤레이터의 효과적인 동작과 파괴 방지를 위해 ESD(Electro Static Discharge) 보호회로를 내장한 LDO 레귤레이터를 제안한다. 제안하는 LDO 레귤레이터는 additional feedback current 회로구조를 이용하여 LDO 레귤레이터의 출력전압에 따라 더욱 효과적으로 패스 트랜지스터의 게이트 노드 전압을 조절할 수 있다. 또한 기존의 ESD 보호소자에 P+ bridge를 추가하여 SCR 루프 상의 전류 이득을 감소시켜 홀딩 전압을 약 2V 가량 높인 새로운 구조를 내장하여 ESD 상황에 대해 높은 신뢰성을 가질 것으로 예상된다.

This paper proposes an LDO regulator with a built-in ESD (Electro Static Discharge) protection circuit to effectively operate and prevent destruction of the LDO (Low Drop Out) regulator according to the load current. The proposed LDO regulator can more effectively adjust the gate node voltage of the pass transistor according to the output voltage of the LDO regulator by using an additional feedback current circuit structure. In addition, it is expected to have high reliability for the ESD situation by embedding a new structure that increases the holding voltage by about 2V by reducing the current gain on the SCR loop by adding a P+ bridge to the existing ESD protection device.

17

고속선 궤도회로 유지보수효율 향상을 위한 차상검측시스템에 관한 연구

박기범, 류상환, 김용규

[Kisti 연계] 한국철도학회 한국철도학회 학술대회논문집 2006 pp.825-831

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18

PDP용 브리지가 없는 고효율 ZVZCS 역률개선회로

조규민, 유병규, 문건우

[Kisti 연계] 전력전자학회 전력전자학회 학술대회논문집 2004 pp.704-708

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원문보기

Recently, many nation have released standard such as IEC 61000-3-2 and IEEE 59, which impose a limit on the harmonic current drawn by equipment connected to AC line in order to prevent the distortion of an AC Line. Therefore, Plasma Display Panel (PDP) which is highlightened in digital display device also has the Power Factor Correction (PFC) circuit to meet the harmonic requirements. In PDP power module, the conventional boost converter is usually used for the PFC circuit. However, it comes serious thermal problem on it's bridge diode due to heat of PDP, and therefore the system stability is not guaranteed. In this paper, the bridgeless boost converter, which is used for PFC circuit of the PDP power module, is designed and verified the possibility of the application in a practical product in a view of efficiency, component count, temperature and etc.

19

자기 압축회로를 이용한 고효율 단펄스 전원모듈 개발

권순걸, 김복권, 임근희

[Kisti 연계] 대한전자공학회 電子工學會論文誌. Journal of the Korean Institute of Telematics and Electronics S. S Vol.s34 No.4 1997 pp.66-74

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원문보기

Recently, high-developed domestic industry and environmental issues demand high-voltage short-pulse power supply(power, voltage, pulse width and repetition rate of 100KW, 150KV, 500ns and 500Hz, respectively) for electron beam process and puolse corona process. In such power supplies magnetic compression circuit can be one of the effectives solutions. In ths study design and operation principle of a pulse-power supply with a three-stage magnetic-compression circuit are described. A good agreement between simulation and experimental results verifies the validity of thescheme. The system delivers energy of 10[J/pulse] at the efficiency of 82%[%].

20

공진회로를 이용한 고효율 Buc 컨버터의 구현

임승하, 사공석진

[Kisti 연계] 대한전자공학회 電子工學會論文誌. Journal of the Korea institute of telematics and electronics. B Vol.b33 No.11 1996 pp.167-174

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원문보기

For the decreasing of switching loss, this paper designs the improved buck converter circuit and then compare with the conventional buck converter and finally analyzes the performance. When the switch is turn-off, in the buck converter using the smoothing capacitor, the flow of transient current and peak voltage having the high frequency components was generated because of the instantaneous open-state in the teminals of the switch. However, the buck converter presented in this paper eliminated this disadvantage by using the L-C circuit. Therefore, the higher PF in 0.85 is achieved than that of the buck converter using the smoothing capacitor. Also, due to the decreasing of the harmonic contain rate, the current usage rate is to be higher than that of the conventional buck converter by 4.48dB and the output voltage varient rate for the step response is to be lower 1.32 times than that of the conventional buck converter.

 
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