Earticle

초록

영어

Monolithic three-dimensional (M3D) integration enhances chip performance and area efficiency by vertically stacking memory elements over CMOS logic layers. [1] Low-temperature processing is essential in M3D to prevent thermal degradation of the underlying circuitry. Oxide semiconductors (OS), particularly indium oxide (In2O3), have shown promise due to their high carrier mobility, low leakage current, and stability under lowtemperature fabrication processes. [2] However, oxygen vacancies (VO) in In2O3 can act as trap states, leading to instability under positive bias temperature stress (PBTS). This study explores the impact of in-situ plasma surface treatment on the In2O3 channel layer of top-gate thin-film transistors (TFTs) before gate insulator deposition. The results demonstrate that plasma surface treatment significantly improves electrical performance and operational stability by reducing interface traps, thereby enhancing device reliability and reducing variability. These findings provide valuable insights for the development of high-performance oxide semiconductor devices for M3D applications.

목차

Abstract
1. Introduction
2. Results and Discussion
3. Conclusion
References

저자

• Jeong Eun Oh [ Department of Electronic Engineering, Hanyang University ]
• Jae Kyeong Jeong [ Department of Electronic Engineering, Hanyang University ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  한국정보통신설비학회 학술대회

• 간기

  반년간

• 수록기간

  2002~2025

• 십진분류

  KDC 567 DDC 621