Earticle

초록

영어

Binarized neural network (BNN) is one of the most efficient neural network for low-cost convolution operations. In BNN, binarized data is utilized to reduce memory size and complexity of convolution operations. A content addressable memory (CAM) based BNN accelerator can perform convolution operations efficiently by taking an advantage of fully parallel search operations in CAM. However, one of the critical issue of CAM based BNN hardware is that the operation reliability is severely degraded by the process variation during ML sensing operation. Therefore, we propose new CAM array design which can reduce hardware error probability. The proposed CAM based accelerator achieves 62% reduction in XNOR-popcount operations, and the classification accuracy drop of Fashion MNIST data set reduces from 2.33% to 1.26%.

목차

Abstract
I. INTRODUCTION
II. CAM BASED BNN ACCELERATOR DESIGN
A. XNOR-popcount operation
B. CAM based BNN Accelerator
III. PROPOSED RELIABILITY IMPROVEMENT TECHNIQUE
IV. RESULT
V. CONCLUSION
ACKNOWLEDGMENT
REFERENCES

키워드

저자

• Sureum Choi [ Information and Communication Engineering Inha University ]
• Youngjun Jeon [ Information and Communication Engineering Inha University ]
• Yeongkyo Seo [ Information and Communication Engineering Inha University ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  한국차세대컴퓨팅학회 학술대회

• 간기

  반년간

• 수록기간

  2021~2025

• 십진분류

  KDC 566 DDC 004