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Design SPARTAN FPGA-Based PD Controller for FOD Systems

첫 페이지 보기
  • 발행기관
    보안공학연구지원센터(IJSH) 바로가기
  • 간행물
    International Journal of Smart Home 바로가기
  • 통권
    Vol.10 No.11 (2016.11)바로가기
  • 페이지
    pp.177-196
  • 저자
    Amirzubir Sahamijoo, Farzin Piltan, Hootan Ghiasi, Mohammad Reza Avazpour, Mohammad Hadi Mazloom, Nasri B. Sulaiman
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A292653

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원문정보

초록

영어
It goes without saying that, there is quite a diverse mixture of the linear controller. Nevertheless, I assume the most famous would probably be Proportional Integral (PI) controller. The things with PI controller are that most of PI controllers are reduction the error. As well as PI controllers, another kind of linear controller worth mentioning could be Proportional Derivative (PD) controller and the unique characteristic of PD controller is that PD controllers are high speed and independent of system’s dynamic modeling. In addition, there are the usual things like PID controllers and PI2D controllers. The main objective of this paper designs a minimum delay proportional-derivative (PD) controller to the control of first order delay (FOD) system. First order delay system has delay time about 4 seconds in certain and about 19 seconds in limited uncertain condition. To improve the flexibility, design high-speed and low-cost controller, the micro-electronic device (FPGA-Based) controller is used in this research. The proposed design is 30-bits FPGA-based controller for inputs and 35-bits for output. In this research, the maximum frequency is 63.629 MHz and the minimum period is 15.716 ns, the minimum input arrival time before the clock is 4.362 ns and the maximum output required time after clock is19.727 ns. In this algorithm, the delay time for the derivative algorithm is 15.526 ns which 87.8% is a logic delay and 12.2% is route delay.

목차

Abstract
 1. First Oder Delay (FOD) System
 2. Control of First Order Delay (FOD) System
 3. Design Spartan FPGA based PD Controller
 4. Conclusion
 References

키워드

real-time operation Field Programmable Gate Array FPGA PD control algorithm first order delay (FOD) system VHDL Xilinx delay time logic delay route delay

저자

  • Amirzubir Sahamijoo [ Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran ]
  • Farzin Piltan [ Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran ]
  • Hootan Ghiasi [ Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran ]
  • Mohammad Reza Avazpour [ Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran ]
  • Mohammad Hadi Mazloom [ Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran ]
  • Nasri B. Sulaiman [ 1. Intelligent Systems and Robotics Lab, Iranian Institute of Advanced Science and Technology (IRAN SSP), Shiraz/Iran / 2. Department of Electrical and Electronic Engineering, Faculty of Engineering, University Putra Malaysia, Malaysia ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJSH) [Science & Engineering Research Support Center, Republic of Korea(IJSH)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Smart Home
  • 간기
    격월간
  • pISSN
    1975-4094
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

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