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DH-LRU: Dynamic Hybrid LRU Caching Scheme for PRAM/DRAM Hybrid Main Memory

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  • 발행기관
    보안공학연구지원센터(IJGDC) 바로가기
  • 간행물
    International Journal of Grid and Distributed Computing SCOPUS 바로가기
  • 통권
    Vol.9 No.11 (2016.11)바로가기
  • 페이지
    pp.81-94
  • 저자
    Yongjian Ren, Hongtianchen Xie, Gangyong Jia, Jilin Zhang, Yuyu Yin, Jian Wan
  • 언어
    한국어(KOR)
  • URL
    https://www.earticle.net/Article/A291313

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원문정보

초록

영어
Both performance and capacity of the main memory are the key to the computer systems in current architecture. DRAM, which is the most used main memory, can’t extend in capacity for its high energy consumption and repeatedly refresh. Fortunately, some new memory mediums, such as phase-change memory (PRAM), are used to replace traditional DRAM memory. These new memories have many advantages, like low energy consumption, without repeatedly refresh, high density storage, and so on. Therefore, these memories are promising. However, their low read/write performance and limited life are restricted the replacement process. In current time, hybrid memory, which consists of both PRAM and DRAM, is a good choice. In this way, the memory capacity can be extended. So, the most challenge for the hybrid memory is the performance. In this paper, we propose a dynamic hybrid LRU caching scheme (DH-LRU) for the last level cache in PRAM/DRAM hybrid main memory to improve the main memory performance. Compared with traditional cache policies, like LRU, FIFO, RANDOM, CFLRU, our DH-LRU improves performance by 4.6%. Moreover, energy consumption of write and read operation can be reduced up to 88.2%.

목차

Abstract
 1. Introduction
 2. Motivation
  2.1. Traditional Caching Schemes in PDRAM
 3. Related Works
  3.1. LRU Caching Scheme
  3.2. Clean-First LRU Caching Scheme
  3.3. Caching Schemes Based On Frequency Values
  3.4. Shortcomings and Usage
 4. Dynamic Hybrid LRU Caching scheme
  4.1. Principles of Design
  4.2. Implementation
 5. Experiment Settings
  5.1. System Configuration
  5.2. Configurations
  5.3. Experiment
 6. Results & Analyses
  6.1. Performance Improvement
  6.2. The Effects of Different Proportion and Position P
  6.3. The Effects of Different Threshold
  6.4. Utilization of PRAM
  6.5. Overhead of DH-LRU
  6.6. Energy Consumption of DH-
 7. Conclusion
 References

키워드

phase change memory hybrid memory architecture cache policy performance; energy

저자

  • Yongjian Ren [ Department of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China ]
  • Hongtianchen Xie [ Department of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China ]
  • Gangyong Jia [ Department of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China / Key Laboratory of Complex Systems Modeling and Simulation, Ministry of Education ]
  • Jilin Zhang [ Department of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China / Key Laboratory of Complex Systems Modeling and Simulation, Ministry of Education ]
  • Yuyu Yin [ Department of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China / Key Laboratory of Complex Systems Modeling and Simulation, Ministry of Education ]
  • Jian Wan [ School of Information and Electronic Engineering, Zhejiang University of Science and Technology, Hangzhou ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJGDC) [Science & Engineering Research Support Center, Republic of Korea(IJGDC)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Grid and Distributed Computing
  • 간기
    격월간
  • pISSN
    2005-4262
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

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