Earticle

초록

영어

This paper describes a 12-bit 100kS/s successive approximation register analog-to-digital converter (SAR ADC) for biomedical system. Both top-plate sampling technique and VCM-based switching technique are applied to the capacitor digital-to-analog converter (CDAC) to implement a 12-bit SAR ADC with 10-b capacitor array DAC. To enhance the linearity of proposed ADC, thermometer decoder is used in capacitor array DAC. Switching-energy minimization technique, asynchronous control with a low-power delay circuit and true single phase clocking (TSPC) D_FF are also adopted to reduce power consumption. Simulation results show that the proposed ADC achieves the SNDR of 70.97dB, the SDFR of 80.23dB and the ENOB of 11.49b with the CMOS 0.18m technology. Total power consumption is 11.16W under the supply voltage of 1.8V at the sampling frequency of 100 kHz. And the figure of merit (FoM) is 38.79fJ/conversion-steps.

목차

Abstract
 1. Introduction
 2. Architecture of the Proposed ADC
 3. Proposed ADC
  3.1. Proposed DAC
  3.2. Dummy Capacitor Switching Technique
  3.3. Low Power Delay Circuits
 4. Simulation Results and Performance Summary
 5. Conclusion
 Acknowledgments
 References

키워드

저자

• Sung-Chan Rho [ Department of Electronics and Computer Engineering, Seokyeong University ]
• Shin-Il Lim [ Department of Electronics Engineering, Seokyeong University Seoul, Korea ] Corresponding author

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of u- and e- Service, Science and Technology

• 간기

  격월간

• pISSN

  2005-4246

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605