Earticle

초록

영어

In this paper, a warp scheduler is proposed for the improvement of multi-core stream processor based GP-GPU performance. The proposed warp schedulers are divided into odd and even warps, which are issued separately by applying the dual-warp issue. Furthermore, it can simultaneously process up to four instructions because each warp can issue two instructions through superscalar issue. The superscalar issue has a limitation in that it cannot simultaneously process two instructions having data dependence. To solve this limitation, the warp scheduler determines the instruction issuance by testing the issuing condition of the multi-core processor and the read/write register dependence. For scheduling algorithm, the round-robin algorithm was used. To measure the performance of multi-core stream processors, the Gaussian filter mask processing result of the GP-GPU using the proposed warp scheduler was compared with that of the multi-core CPU on various embedded platforms. The experiment results showed that the processing speed of the GP-GPU using the warp scheduler was 6-7 times faster. The GP-GPU also performed better on an image processing application.

목차

Abstract
 1. Introduction
 2. Scheduling Algorithm
  2.1. FCFS (First-Come, First Served Scheduling)
  2.2. SJF (Shortest-Job-First Scheduling)
  2.2. Priority Scheduling
  2.3. Round-Robin
 3. Proposed Warp Scheduler
  3.1. Superscalar Issue
  3.2. Warp Scheduler
  3.3. Warp Scheduler Sub Module
  3.4. Scheduling
  3.5. Scheduling Example
 4. Results
  4.1. General Processing Experiment
  4.2. Image Processing Experiment
 5. Conclusions
 Acknowledgments
 References

키워드

저자

• Do-Hyun Kim [ Department of Computer Engineering, Seokyeong University, Korea ]
• Jong Joon Park [ Department of Computer Science, Seokyeong University, Korea ] Corresponding author

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Multimedia and Ubiquitous Engineering

• 간기

  월간

• pISSN

  1975-0080

• 수록기간

  2008~2016

• 등재여부

  SCOPUS

• 십진분류

  KDC 505 DDC 605