Earticle

초록

영어

A 4th-Order low-distortion low-pass ΣΔ modulator structure is proposed in this paper, which uses the timing-sharing between the 3rd and 4th integrators during one clock phase. Compared with conventional cascade of integrators with distributed feed-forward (CIFF) sigma-delta modulator structure, the proposed structure not only solves the critical timing issue for the quantizer and feedback DAC path, but also eliminates an extra active adder to sum up the input feed-forward. By methods of delay redistribution structure, the time for quantization and feedback dynamic element match (DEM) operation can be extended from a non-overlapping interval for a conventional low-distortion structure to half of the sampling clock period. Capacitive input feed-forward (CIF) methodology eliminates the adder in front of the quantizer. Further, the op-amp of the last integrator is used as an active adder by op-amp sharing. Therefore, the power consumption can be reduced and the linearity of the feedback DAC is improved because of the increasing time which used for implementation of DEM algorism. The proposed 4th-Order low-distortion low-pass ΣΔ modulator with 4-bit quantizer is simulated in MATLAB. From the simulation results, the proposed structure can achieve a peak SNR (signal- to-noise ratio) of 87dB with 2.5MHz bandwidth under 32 oversampling ratio at 160MHz sampling frequency and the ENOB of 14.234bits in non-ideal condition.

목차

Abstract
 1. Introduction
 2. Proposed 4th-order Sigma-delta Modulator Topology
  2.1. Modulator Architecture
  2.2. Timing
 3. Implementation of the Proposed Architecture
  3.1. MATLAB Simulation
  3.2. Other Similar Structure Performance
 4. Conclusions
 Acknowledgements
 References

키워드

저자

• Hong-guo Zhang [ Harbin University of Science and Technology, Harbin, China, 150030 ]
• Ji-bao Zhang [ Collage of Computer Science and Technology Harbin University of Science and Technology, Harbin, China, 150080 ]
• Ming-yuan Ren [ Harbin University of Science and Technology, Harbin, China, 150030 ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Signal Processing, Image Processing and Pattern Recognition

• 간기

  격월간

• pISSN

  2005-4254

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605