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An Optimization of CORDIC Algorithm and FPGA Implementation

첫 페이지 보기
  • 발행기관
    보안공학연구지원센터(IJHIT) 바로가기
  • 간행물
    International Journal of Hybrid Information Technology 바로가기
  • 통권
    Vol.8 No.6 (2015.06)바로가기
  • 페이지
    pp.217-228
  • 저자
    Rui Xu, Zhanpeng Jiang, Hai Huang, Changchun Dong
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A251234

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원문정보

초록

영어
ASIC and FPGA ASIC and FPGA are considered to be the ideal platform for special fast calculations because of the hardware structure, and how to achieve computational algorithm by is the hotpot of research. The CORDIC (Coordinate Rotational Digital Computer) can break the basis functions down to operations of shift and addition or subtraction, which can be used to lay the foundation for the realization of complex logic. But the functions selected by traditional CODIC for angle encoding are too complex, which will lead to some problems, such as too much of area consumption and large delay. In this paper, an optimization of CORDIC algorithm are proposed, which reduce the consumption of Adders and comparators, decrease the complexity and delay of the algorithm implement in hardware. The proposed algorithms are modeled in Verilog Hardware Description Language and implemented with FPGA. The simulation results show that the functions of sine and cosine are realized successfully, and the proposed algorithm not only improves the computation speed but also reduces the system hardware resources.

목차

Abstract
 1. Introduction
 2. Principle of CORDIC Algorithm
 3. Problems and Optimization of CORDIC Algorithm
  3.1 Relationship between the Number of Iterations and Accuracy of Data
  3.2 Limitations of CORDIC Algorithm
  3.3 Range of Angle
  3.4 Optimization of CORDIC Algorithm
  3.5 Adjustment of Range of the Input Angle
 4. Implementation of the CORDIC Algorithm based on FPGA
  4.1 Introduction of Tools for Development
  4.2 Design of the System
 5 .Simulation of CORDIC Algorithm based on FPGA
  5.1 Simulation of Traditional CORDIC Algorithm
  5.2 Simulation of the Optimized CORDIC Algorithm based on FPGA
 6. Conclusions
 Acknowledgements
 References

키워드

CORDIC FPGA ultra-high-speed integrated circuit optimization

저자

  • Rui Xu [ Department of Integrated circuits design and integrated systems,Harbin University of Science and Technology ,Harbin, Heilongjiang, China ]
  • Zhanpeng Jiang [ Department of Integrated circuits design and integrated systems,Harbin University of Science and Technology ,Harbin, Heilongjiang, China ]
  • Hai Huang [ Department of Integrated circuits design and integrated systems,Harbin University of Science and Technology ,Harbin, Heilongjiang, China ]
  • Changchun Dong [ Department of Integrated circuits design and integrated systems,Harbin University of Science and Technology ,Harbin, Heilongjiang, China ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJHIT) [Science & Engineering Research Support Center, Republic of Korea(IJHIT)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Hybrid Information Technology
  • 간기
    격월간
  • pISSN
    1738-9968
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

이 권호 내 다른 논문 / International Journal of Hybrid Information Technology Vol.8 No.6

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