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Design of a ROM-Less Direct Digital Frequency Synthesizer on FPGA

첫 페이지 보기
  • 발행기관
    보안공학연구지원센터(IJSIP) 바로가기
  • 간행물
    International Journal of Signal Processing, Image Processing and Pattern Recognition 바로가기
  • 통권
    Vol.8 No.5 (2015.05)바로가기
  • 페이지
    pp.327-340
  • 저자
    Zhanpeng Jiang, Rui Xu, Hai Huang, Changchun Dong
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A246171

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원문정보

초록

영어
DDFS (Direct Digital Frequency Synthesizer) is a new technique of frequency synthesizes which introduces the advanced digital processing theory into frequency synthesis. A direct digital frequency synthesizer is composed of a phase accumulator, an adder, an ROM for wave pattern saving, a D/A converter and a LPF (low pass filter). With the rapid development of VLSI, the speed of algorithm is required increasingly higher. This paper proposes a new frequency synthesizer by improving the structure of data storage which ensures the accuracy and speed. Rotation method was used to resolve the expected angle into many small rotation angles and sting wave symmetry principle was used to resolve the string wave. From point to area, the values in one quadrant were calculated and sampled and then the data was saved in ROM. Under the control of frequency, the data in ROM was read and then transferred to the D/A converter chip and the following low pass filter to achieve frequency synthesize. This algorithm could reduce the usage of ROM to increase the calculation efficiency.

목차

Abstract
 1. Introduction
 2. Frequency Synthesizer
  2.1. Direct Analog Synthesis
  2.2 Indirect Frequency Synthesis
  2.3 Direct Digital Frequency Synthesis
  2.4 The Design of String Wave Generator
  2.5 Error Analysis
 3.The Design and Realization of the Frequency Synthesizer
  3.1The Application of String Wave Symmetry
  3.2 The Improvement of Register
  3.3 The Realization of Frequency Synthesizer
 4. The Simulation and Assessment of the Frequency Synthesizer
  4.1 Design of the Frequency Generator
  4.2 The FPGA Realization of the Frequency Synthesizer
  4.3 The Result and Analysis of Simulation
 5. Conclusions
 References

키워드

string wave digital frequency synthesizes usage efficiency Verilog FPGA

저자

  • Zhanpeng Jiang [ Department of Integrated circuits design and integrated systems, Harbin University of Science and Technology, Harbin, Heilongjiang, China ]
  • Rui Xu [ Department of Integrated circuits design and integrated systems, Harbin University of Science and Technology, Harbin, Heilongjiang, China ]
  • Hai Huang [ Department of Integrated circuits design and integrated systems, Harbin University of Science and Technology, Harbin, Heilongjiang, China ]
  • Changchun Dong [ Department of Integrated circuits design and integrated systems, Harbin University of Science and Technology, Harbin, Heilongjiang, China ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJSIP) [Science & Engineering Research Support Center, Republic of Korea(IJSIP)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Signal Processing, Image Processing and Pattern Recognition
  • 간기
    격월간
  • pISSN
    2005-4254
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

이 권호 내 다른 논문 / International Journal of Signal Processing, Image Processing and Pattern Recognition Vol.8 No.5

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