Earticle

초록

영어

In the era of industrialization, technological revolution reduced the intervention of humans to assist machinery. The privatization slogan has increased the competition among industries which leads to origin of new products/designs for automation. The paper presents, one such, design and implementation of 64-bit RISC processor on SOC for industry automation, mainly useful for packing of bottles in bottling plant. The design includes processor with BIST features; it is a mechanism that allows a machine to test itself. Here RISC processor is used to decrease the number of instructions and they execute the instruction at faster rate. Later the design is integrated on System on Chip (SoC) to obtain a single chip which reduces the overall power consumption. The design and synthesis is done by verilog and verified in cadence IUS and RTL compiler. The physical design is done by SoC encounter 11.10 version.

목차

Abstract
 1. Introduction
 2. System On Chip
 3. Proposed Architecture
 4. Simulation Results:
 5.Conclusion
 References

키워드

저자

• P. Devi Pradeep [ Assistant Professor, Department of ECE, GMR Institute of Technology, RAJAM, A.P, India ]
• D.Srinivasa Rao [ Assistant Professor, Department of ECE, GMR Institute of Technology, RAJAM, A.P, India ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of u- and e- Service, Science and Technology

• 간기

  격월간

• pISSN

  2005-4246

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605