Earticle

초록

영어

Now a day’s hardware realization of image processing applications using FPGA is an important area of research due to the speed of implementation, low development costs and less time to market. This is due to the parallelism existing in it. In this paper an efficient architecture for Digital Image Watermarking algorithm using Xilinx System Generator (XSG) is proposed. The objective is, to simulate, synthesize and implement Image Watermarking algorithm on FPGA platform. Hardware implementation of watermarking is realized using the Xilinx Block Sets presented in Simulink. The generated hardware software co-simulation block for Virtex6 FPGA, VHDL/Verilog code and the test-benches are tested on the FPGA development board. Then it is validated in terms of area, power and performance metrics.

목차

Abstract
 1. Introduction
 2. Xilinx System Generator
 3. Watermarking
  3.1. Embedding/Extraction Algorithm
  3.2. Implementation in Simulink
  3.3. H/W S/W Co-Simulation
 4. Results
 5. Conclusion
 References

키워드

저자

• Korrapati Rajitha [ Department of Electronics and Communications Engineering,VFSTR University, Vadlamudi-522213, Guntur, India ]
• Usha Rani.Nelakuditi [ Department of Electronics and Communications Engineering, VFSTR University, Vadlamudi-522213, Guntur, India ]
• Venkata Naresh Mandhala [ Department of Information Technology, VFSTR University, Vadlamudi-522213, Guntur, India ]
• Tai-hoon Kim [ Department of Convergence Security, Sungshin Women's University ] Corresponding Author

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Security and Its Applications

• 간기

  격월간

• pISSN

  1738-9976

• 수록기간

  2008~2016

• 등재여부

  SCOPUS

• 십진분류

  KDC 505 DDC 605