Earticle

초록

영어

This paper presents the implementation of high-speed block, cipher, HIGHT. The proposed architecture employs parallel architecture to enhance throughput. In addition, it shares key scheduling block for encryption and decryption to reduce hardware complexity. It also introduces an efficient protocol applicable to RFID systems, implementing the HIGHT block cipher algorithm. The new HIGHT structure yields a size small enough to afford tag applications and twice as high performance with respect to conventional HIGHT implementation. The proposed protocol overcomes the security vulnerability of RFID tags, and reduces energy consumption per transaction by sharing key generation.

목차

Abstract
 1. Introduction
 2. The Proposed Architecture of HIGHT Block Cipher
 3. The Proposed Protocol for RFID System in UHF Band
 4. Simulation Results
 5. Conclusions
 Acknowledgement
 References

키워드

저자

• Je-Hoon Lee [ Div. of Electronics, Information and Communication Eng., Kangwon National University, Samcheok, Gangwon, 245-711, Rep. of Korea ]
• Duk-Gyu Lim [ Div. of Electronics, Information and Communication Eng., Kangwon National University, Samcheok, Gangwon, 245-711, Rep. of Korea ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Security and Its Applications

• 간기

  격월간

• pISSN

  1738-9976

• 수록기간

  2008~2016

• 등재여부

  SCOPUS

• 십진분류

  KDC 505 DDC 605