Earticle

초록

영어

In this paper, we present three novel input buffer schemes for systems with network on chip. These proposed buffer schemes are based on a self-compacting buffer, and can provide larger available buffer space per physical channel for communicating applications. These schemes outperform existing approaches. DAMQshr has similar performance using only sixty three percent of the buffer size that is used in traditional implementation for NoCs. DAMQmin provides an excellent technique to optimize buffer management, and provides a good throughput when the network has a larger load. In addition, they also have better utilization of the available buffer space.

목차

Abstract
 1. Introduction
 2. Background
 3. The Novel Buffer Schemes
  3.1. DAMQ with Reserved Space for all Virtual Channels Scheme
  3.2. DAMQ with Minimum Reserved Space for Virtual Channels Scheme
  3.3. Shared DAMQ Buffer Scheme
 4. Performance Evaluation
  4.1. Simulated Network Configurations
  4.2. Performance Metrics
  4.3. Simulation Results
 5. Conclusions and Future Work
 Acknowledgements
 References

키워드

저자

• Jin Liu [ College of Information Engineering, Shanghai Maritime University ]
• Hongmin Ren [ College of Information Engineering, Shanghai Maritime University ]
• José G. Delgado-Frias [ School of EECS, Washington State University ]
• Jeong-Uk Kim [ Department of Energy Grid, Sangmyung University ]
• Jin Wang [ Computer and Software School, Nanjing University of Information Science & Technology ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Future Generation Communication and Networking

• 간기

  격월간

• pISSN

  2233-7857

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605