Earticle

초록

영어

In this paper, we propose a power effective bus encoding scheme which can minimize crosstalk problems as well as bus transitions effectively. In current submicron technology, minimizing propagation delay and power consumption on buses is one of the most important design objectives in the field of System-on-Chip (SoC) design. Crosstalk between adjacent wires on bus may create significant propagation delay. Elimination or minimization of such faults is crucial not only for the system performance, but also for the reliability of SoC designs. Experimental results show that our proposed encoding technique can save dynamic power by up to 23.3% for 4- bit buses, while completely removing crosstalk delay.

목차

Abstract
 1. Introduction
 2. Preliminaries
  2.1. Bus Energy Dissipation
  2.2. Crosstalk Model
 3. Proposed Algorithm
  3.1. Inverting Function
  3.2. Converting Function
  3.3. Detecting Function
 4. Simulation Result
 5. Conclusions
 Acknowledgements
 References

키워드

저자

• Young Chul Kim [ Dept. Electronics and Computer Engineering, Chonnam National Univ ]
• Youn Jin Lee [ Dept. Communication, R&D Institute of LG Innotek Co ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Control and Automation

• 간기

  월간

• pISSN

  2005-4297

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605