Earticle

초록

영어

This paper proposes two topics for a high performance fingerprint sensor. A modified capacitive detection circuit of charge sharing scheme is proposed, which shows 40% reduction of power consumption and 90% improvement of difference between a ridge and valley sensing voltage than typical scheme. This paper also proposes an effective fingerprint identification system with hardware unit (thinning processor) for thinning stage processing of a verification algorithm based on minutiae. Each step of a fingerprint algorithm is analyzed on FPGA and ARMulator. The proposed scheme just needs 56,000 cycles for a thinning processing in 160x192 pixel array and the layout area is 0.541 mm2 at 0.35μm CMOS process.

목차

Abstract
 1. Introduction
 2. Fingerprint Sensor Design
  2.1. Typical sensing scheme
  2.2. Proposed sensing scheme
 3. Identification Algorithm and Thinning Processor Design
  3.1. Analysis of Algorithm
  3.2. Thinning processor design
  3.3. Circuit integration and system
 4. Conclusion
 Acknowledgements
 References

키워드

저자

• Seung Min Jung [ School of Information and Telecommunication, Hanshin University, Osan, Korea ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Bio-Science and Bio-Technology

• 간기

  격월간

• pISSN

  2233-7849

• 수록기간

  2009~2016

• 등재여부

  SCOPUS

• 십진분류

  KDC 505 DDC 605