Earticle

현재 위치 Home

Consumer Electronics

Automatic Method For Efficient Hardware Implementation From RVC-CAL Dataflow: A LAR Coder baseline Case Study

첫 페이지 보기
  • 발행기관
    한국정보기술융합학회 바로가기
  • 간행물
    JoC 바로가기
  • 통권
    Volume1 Number1 (2010.12)바로가기
  • 페이지
    pp.85-92
  • 저자
    Khaled Jerbi, Matthieu Wipliez, Mickaël Raulet, Marie Babel, Olivier Déforges, Mohamed Abid
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A188417

※ 원문제공기관과의 협약기간이 종료되어 열람이 제한될 수 있습니다.

원문정보

초록

영어
Implementing an algorithm into hardware platforms is generally not an easy task. The algorithm, typically described in a high-level specification language, must be translated into a low-level HDL language. The difference between models of computation (sequential versus fine-grained parallel) limits the efficiency of automatic translation. On the other hand, manual implementation is time-consuming, because the designer must take care of low-level details, and write test benches to test the implementation’s behaviour. This paper presents a global design method, from high level description to implementation. The first step consists of the description of an algorithm as a dataflow program using RVC-CAL language. The next step is the functional verification of this description using a software framework. The final step consists of an automatic generation of an efficient hardware implementation from the dataflow program. The objective is to spend the greater part of the conception time in an open source software platform. We use this method to quickly prototype and generate hardware implementation of a baseline part of the LAR coder, from an RVC-CAL description.

목차

Abstract
 I. INTRODUCTION
 II. DATAFLOW PROGRAMMING FOR HARDWARE IMPLEMENTATION
  A. Dataflow programming with RVC-CAL language
  B. Functional verification on a software platform
  C. HDL generation
 III. THE LAR CODER
  A. FLAT LAR
  B. Spectral coder: the Hadamard transform
 IV. HARDWARE IMPLEMENTATION OF THE LAR CODER BASELINE
  A. Hardware implementation
  B. Results
 V. CONCLUSION
 REFERENCES

저자

  • Khaled Jerbi [ INSA of Rennes UMR CNRS 6164, IETR Group, Rennes, France ]
  • Matthieu Wipliez [ INSA of Rennes UMR CNRS 6164, IETR Group, Rennes, France ]
  • Mickaël Raulet [ INSA of Rennes UMR CNRS 6164, IETR Group, Rennes, France ]
  • Marie Babel [ INSA of Rennes UMR CNRS 6164, IETR Group, Rennes, France ]
  • Olivier Déforges [ INSA of Rennes UMR CNRS 6164, IETR Group, Rennes, France ]
  • Mohamed Abid [ National school of engineers of Sfax, CES Lab, Sfax, Tunisia ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    한국정보기술융합학회 [Korea Information Technology Convergence Society]
  • 설립연도
    2008
  • 분야
    공학>전자/정보통신공학
  • 소개
    본 학회는 IT 활용 및 융합에 관한 연구 및 교류를 촉진하고 학문의 발전과 응용에 공헌함을 목적으로 한다.

간행물

  • 간행물명
    JoC [Journal of Convergence]
  • 간기
    계간
  • pISSN
    2093-7741
  • eISSN
    2093-775X
  • 수록기간
    2010~2015
  • 십진분류
    KDC 004 DDC 004

이 권호 내 다른 논문 / JoC Volume1 Number1

    피인용수 : 0(자료제공 : 네이버학술정보)

    함께 이용한 논문 이 논문을 다운로드한 분들이 이용한 다른 논문입니다.

      페이지 저장