Earticle

초록

영어

In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The value of MOSFET is calculated by using new drain current model.

목차

Abstract
 1. Introduction
 2. The new current model of the drain saturation current for predicting delay time and simulation
 3. The propagation delay time model and simulation of CMOS inverter
 4. Volage Gain of The MOSFET
 5. The design of VCO circuit and the result of simulation
 6. Conclusion
 REFERENCES

저자

• Ryeo, Ji-Hwan [ School of Electronic Engineering, Daegu University ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  한국정보기술응용학회 학술대회

• 간기

  부정기

• 수록기간

  2001~2011

• 십진분류

  KDC 005 DDC 005