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An FPGA Implementation of Quantized CNN Hardware for IoT Devices

  • 간행물
    한국차세대컴퓨팅학회 학술대회 바로가기
  • 권호(발행년)
    The 7th International Conference on Next Generation Computing 2021 (2021.11) 바로가기
  • 페이지
    pp.351-352
  • 저자
    Jaemyung Kim, Yongwoo Kim, Jin-Ku Kang
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A448094

원문정보

초록

영어
Due to the recent improvement in the computational power of hardware and the growth of data, a deep learning-based approach that optimizes parameters using massive data showed excellent performance. In computer vision, research using a convolutional neural network(CNN) is being actively conducted. However, it is challenging to apply to IoT devices due to the high computational complexity and massive memory usage required. In this paper, we propose a quantized CNN hardware for IoT devices that optimized memory usage and computation complexity. In addition, we present a quantization framework for the proposed hardware design. The presented framework includes floating-point training, quantization, fully integer arithmetic inference, and hardware design processes. As a result of implementing the quantized CNN on the Xilinx ZC702 evaluation board, power consumption and inference speed improved by 4.86× and 2.58×, respectively, compared to 32-bit floating-point hardware.

목차

Abstract
I. INTRODUCTION
II. PROPOSED QUANTIZED CNN HARDWARE
A. Framework Overview
B. Quantization
C. Fully Integer Arithmetic Inference
D. Hardware Architecture
III. EXPERIMENT RESULTS
IV. CONCLUSION AND FUTURE WORK
ACKNOWLEDGMENT
REFERENCES

저자

  • Jaemyung Kim [ dept. Electrical Computer Engineering Inha University ]
  • Yongwoo Kim [ dept. System Semiconductor Engineering Sangmyung University ]
  • Jin-Ku Kang [ dept. Electrical Computer Engineering Inha University ] Corresponding Author

참고문헌

자료제공 : 네이버학술정보

    간행물 정보

    • 간행물
      한국차세대컴퓨팅학회 학술대회
    • 간기
      반년간
    • 수록기간
      2021~2025
    • 십진분류
      KDC 566 DDC 004