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Weight Overlap Effect for On-Chip Learning with Memristor Devices

  • 간행물
    한국차세대컴퓨팅학회 학술대회 바로가기
  • 권호(발행년)
    The 8th International Conference on Next Generation Computing 2022 (2022.10) 바로가기
  • 페이지
    pp.224-225
  • 저자
    Geun Ho Lee, Min Suk Song, Hyungjin Kim
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A419782

원문정보

초록

영어
Recently, neuromorphic system has been actively studied as hardware-based neural networks using memristive devices to overcome the limitations of Von-Neumann architecture. In particular, on-chip learning has been proposed and optimized because hardware itself can learn based on weight-update linearity characteristics. In this study, we demonstrate the effect of weight overlap region on on-chip learning when designing the learning characteristics of devices. We use identical potentiation/depression pulse of fabricated Pt/Al2O3/TiOX/Ti/Pt stacked memristors to study the effect of conductance overlap region on the recognition accuracy for modified national institute of standards and technology (MNIST) dataset. The learning characteristics of memristive show a characteristic that is highly dependent on the overlap range.

목차

Abstract
I. INTRODUCTION
II. RESULT AND DISCUSSION
III. CONCLUSION
REFERENCES

저자

  • Geun Ho Lee [ Dept. Electronic Engineering Inha University ]
  • Min Suk Song [ Dept. Electronic Engineering Inha University ]
  • Hyungjin Kim [ Dept. Electronic Engineering Inha University ] Corresponding Author

참고문헌

자료제공 : 네이버학술정보

    간행물 정보

    • 간행물
      한국차세대컴퓨팅학회 학술대회
    • 간기
      반년간
    • 수록기간
      2021~2025
    • 십진분류
      KDC 566 DDC 004