Subthreshold swing degradation of ferroelectric-gate field effect transistor (FeFET) memory are analyzed through DC and fast drain current (ID)-gate voltage (VG) measurements. From the fast ID-VGs before endurance cycling, it is revealed that acceptor-like traps with millisecond-order response time mainly exist in the gate oxide of FeFETs and the traps cause the different subthreshold swing (SS) between erase and program states.
목차
Abstract I. INTRODUCTION II. RESULTS AND DISCUSSION III. CONCLUSION REFERENCES
저자
Sangwoo Kim [ Department of Electrical Engineering, Inha University ]
Jeonghan Kim [ Department of Electrical Engineering, Inha University ]
Soi Jeong [ Department of Electrical Engineering, Inha University ]
Kiryun Kwon [ Department of Electrical Engineering, Inha University ]
Corresponding Author
Changhyeon Han [ Department of Electrical Engineering, Inha University ]
Eunchan Park [ Department of Electrical Engineering, Inha University ]
Jiyong Yim [ Department of Electrical Engineering, Inha University ]
Been Kwak [ Department of Electrical Engineering, Inha University ]
Jiwon You [ Department of Electrical Engineering, Inha University ]
Daewoong Kwon [ Department of Electrical Engineering Inha University ]