Earticle

초록

영어

A 4Gb/s transceiver with the CTLE is presented. The proposed CTLE can recover the attenuated data up to 7dB by changing the digital codes which are received from the digital control logic. The proposed transceiver was designed and fabricated in 180-nm CMOS technology and consumes 60.37mW.

목차

Abstract
I. INTRODUCTION
II. TRANSCEIVER DESIGN
A. Transmitter (TX) Design
B. Receiver (RX) Design with CTLE
C. Digital Logic for Digital Calibration
IV. CONCLUSION
REFERENCES

저자

• Taehwan Kim [ Information and Communication Engineering Inha University ]
• Donghyun Kim [ Information and Communication Engineering Inha University ]
• Hyunmin Shin [ Information and Communication Engineering Inha University ]
• Saransh Rajjarwal [ Information and Communication Engineering Inha University ]
• Gyungsu Byun [ Information and Communication Engineering Inha University ]

참고문헌