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Automata Processor Architecture and Applications: A Survey

첫 페이지 보기
  • 발행기관
    보안공학연구지원센터(IJGDC) 바로가기
  • 간행물
    International Journal of Grid and Distributed Computing SCOPUS 바로가기
  • 통권
    Vol.9 No.4 (2016.04)바로가기
  • 페이지
    pp.53-66
  • 저자
    Nourah A.Almubarak, Anwar Alshammeri, Imtiaz Ahmad
  • 언어
    영어(ENG)
  • URL
    https://www.earticle.net/Article/A272906

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원문정보

초록

영어
Finite automata-based algorithms are becoming increasingly important for a wide range of application domains to process large volumes of unstructured data. Current processor technologies are not well suited to accelerate massively parallel operations related to the search and analysis of complex and unstructured data streams pattern identification problems. Hardware designers are exploring new processing technologies to accelerate pattern identification problems. One such technology is the recently introduced Micron Automata Processor (AP), which is a novel and powerful reconfigurable non-von Neumann processor that can be used for direct implementation of multiple Non-deterministic Finite Automata (NFAs) running concurrently on the same input stream. AP has a linear-scalable, two-dimensional MISD (Multiple Instruction Single Data) fabric comprised of thousands of interconnected small processing elements called State Transition Elements (STEs) to analyze complex data streams simultaneously to accelerate solving massively complex problems. The AP is promising future technology which provides new operations and new avenues for exploiting parallelism to accelerate the growing and important class of automata-based algorithms. In this paper, we present a survey of the state-of-the-art in automata processor based hardware accelerators. We describe AP hardware architecture, its programming environments, summarize its current successful applications in a wide range of diverse fields and explore future research trends and opportunities in this increasingly important area of automata computing paradigm.

목차

Abstract
 1. Introduction
 2. AP Architecture
  2.1. Computational Elements
  2.2. Programming Resources
  2.3. AP Architecture Limitation
 3. Programming Environment
  3.1. Pearl Compatible Regular Expression (PCRE)
  3.2. Automata Network Markup Language (ANML)
  3.3. RAPID Programming
 4. Automata Processor Applications and Techniques
  4.1. Brill Tagging
  4.2. Entity Resolution
  4.3. Association Rule Mining
  4.4. Levenshtein Nondeterministic Finite Automata
  4.5. Discovering Motifs in Biological Sequences
  4.6. Data Encryption
  4.7. Stochastic Computing
  4.8. Track Pattern Recognition
 5. Conclusion and Future Work
 References

키워드

Automata Processor (AP) Computer Architecture Hardware Accelerators Non-Deterministic Finite Automata (NFA) Pattern Matching Regular Expressions

저자

  • Nourah A.Almubarak [ Department of Computer Engineering, Kuwait University, Kuwait ]
  • Anwar Alshammeri [ Department of Computer Engineering, Kuwait University, Kuwait ]
  • Imtiaz Ahmad [ Department of Computer Engineering, Kuwait University, Kuwait ]

참고문헌

자료제공 : 네이버학술정보

간행물 정보

발행기관

  • 발행기관명
    보안공학연구지원센터(IJGDC) [Science & Engineering Research Support Center, Republic of Korea(IJGDC)]
  • 설립연도
    2006
  • 분야
    공학>컴퓨터학
  • 소개
    1. 보안공학에 대한 각종 조사 및 연구 2. 보안공학에 대한 응용기술 연구 및 발표 3. 보안공학에 관한 각종 학술 발표회 및 전시회 개최 4. 보안공학 기술의 상호 협조 및 정보교환 5. 보안공학에 관한 표준화 사업 및 규격의 제정 6. 보안공학에 관한 산학연 협동의 증진 7. 국제적 학술 교류 및 기술 협력 8. 보안공학에 관한 논문지 발간 9. 기타 본 회 목적 달성에 필요한 사업

간행물

  • 간행물명
    International Journal of Grid and Distributed Computing
  • 간기
    격월간
  • pISSN
    2005-4262
  • 수록기간
    2008~2016
  • 십진분류
    KDC 505 DDC 605

이 권호 내 다른 논문 / International Journal of Grid and Distributed Computing Vol.9 No.4

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