Earticle

초록

영어

In this paper LVCMOS, HSLVDCI, HSTL, LVDCI_DV2 and SSTL Input/output standard is used for the design of Green Fibonacci generator on 40nm FGPA to generate key for Wi-Fi Protected Access in order to make energy efficient communication. In naming convention of I/O standard, LV is low voltage, HS is high speed, DV2 is half impedance, CMOS is Complementary metal Oxide Semiconductor, DCI is digitally control impedance and SSTL is Stub series Transistor Logic. Here we used two frequencies ranging i.e. 1GHz and 10 GHz. After comparison it is observed that, LVDCI-DC2 is the most energy efficient and SSTL15 is the worst energy efficient on 1GHZ frequency where as SSTL15 and HSTL outperforms better on frequency range 10GHz. There is reduction in I/O power requirement of LVDCI is19.19% as compared to SSTL15 and SSTL15 shows 17.60 % reduction in energy on 10GHz as compared to LVDCI-DC2.

목차

Abstract
 1. Introduction
 2. Literature Review
 3. Block Diagram of Fibonacci Generator
  3.1. Top Level Schematic of Fibonacci Generator
  3.2. RTL Schematic of Fibonacci Generator
  3.3. Technology Schematic of Fibonacci Generator
 4. RESULTS
 5. Conclusion
 6. Future Scope
 References

키워드

저자

• Sumita Nagah [ Gyancity Research Lab New Delhi, India ]
• Bishwajeet Pandey [ Gyancity Research Lab New Delhi, India ]
• Kartik Kalia [ Gyancity Research Lab New Delhi, India ]
• Ravinder Kaur [ Gyancity Research Lab New Delhi, India ]
• Md. Saifur Rahman [ Noakhali Science and Technology University, Noakhali, Bangladesh. ]
• Mahbub-E-Noor [ University of Barisal, Bangladesh ]

참고문헌

발행기관

간행물

표지보기 관심저널 등록

• 간행물명

  International Journal of Control and Automation

• 간기

  월간

• pISSN

  2005-4297

• 수록기간

  2008~2016

• 십진분류

  KDC 505 DDC 605